Searched refs:vclk_div (Results 1 - 7 of 7) sorted by relevance
/linux-master/drivers/gpu/drm/meson/ |
H A D | meson_vclk.c | 372 unsigned int vclk_div; member in struct:meson_vclk_params 384 .vclk_div = 1, 396 .vclk_div = 1, 408 .vclk_div = 1, 420 .vclk_div = 1, 432 .vclk_div = 1, 444 .vclk_div = 2, 456 .vclk_div = 1, 468 .vclk_div = 1, 810 unsigned int vid_pll_div, unsigned int vclk_div, 808 meson_vclk_set(struct meson_drm *priv, unsigned int pll_base_freq, unsigned int od1, unsigned int od2, unsigned int od3, unsigned int vid_pll_div, unsigned int vclk_div, unsigned int hdmi_tx_div, unsigned int venc_div, bool hdmi_use_enci, bool vic_alternate_clock) argument [all...] |
/linux-master/drivers/gpu/drm/radeon/ |
H A D | radeon_uvd.c | 968 unsigned vclk_div, dclk_div, score; local 979 vclk_div = radeon_uvd_calc_upll_post_div(vco_freq, vclk, 981 if (vclk_div > pd_max) 991 score = vclk - (vco_freq / vclk_div) + dclk - (vco_freq / dclk_div); 996 *optimal_vclk_div = vclk_div;
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H A D | rv770.c | 56 unsigned fb_div = 0, vclk_div = 0, dclk_div = 0; local 76 &fb_div, &vclk_div, &dclk_div); 81 vclk_div -= 1; 104 UPLL_SW_HILEN(vclk_div >> 1) | 105 UPLL_SW_LOLEN((vclk_div >> 1) + (vclk_div & 1)) |
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H A D | r600.c | 204 unsigned fb_div = 0, ref_div, vclk_div = 0, dclk_div = 0; local 233 &fb_div, &vclk_div, &dclk_div); 260 UPLL_SW_HILEN(vclk_div >> 1) | 261 UPLL_SW_LOLEN((vclk_div >> 1) + (vclk_div & 1)) |
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H A D | si.c | 6977 unsigned fb_div = 0, vclk_div = 0, dclk_div = 0; local 6995 &fb_div, &vclk_div, &dclk_div); 7036 UPLL_PDIV_A(vclk_div) | UPLL_PDIV_B(dclk_div),
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H A D | evergreen.c | 1192 unsigned fb_div = 0, vclk_div = 0, dclk_div = 0; local 1211 &fb_div, &vclk_div, &dclk_div); 1250 UPLL_PDIV_A(vclk_div) | UPLL_PDIV_B(dclk_div),
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/linux-master/drivers/gpu/drm/amd/amdgpu/ |
H A D | si.c | 1732 unsigned vclk_div, dclk_div, score; local 1743 vclk_div = si_uvd_calc_upll_post_div(vco_freq, vclk, 1745 if (vclk_div > pd_max) 1755 score = vclk - (vco_freq / vclk_div) + dclk - (vco_freq / dclk_div); 1760 *optimal_vclk_div = vclk_div; 1777 unsigned fb_div = 0, vclk_div = 0, dclk_div = 0; local 1795 &fb_div, &vclk_div, &dclk_div); 1838 UPLL_PDIV_A(vclk_div) | UPLL_PDIV_B(dclk_div),
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