/linux-master/drivers/input/rmi4/ |
H A D | rmi_f34v7.c | 37 f34->v7.in_bl_mode = status >> 7; 38 f34->v7.flash_status = status & 0x1f; 40 if (f34->v7.flash_status != 0x00) { 42 __func__, f34->v7.flash_status, f34->v7.command); 55 f34->v7.command = command; 66 if (!wait_for_completion_timeout(&f34->v7.cmd_done, timeout)) { 87 if (f34->v7.flash_status != 0x00) 192 f34->v7.command = command; 241 if (f34->v7 [all...] |
/linux-master/arch/arm64/crypto/ |
H A D | crct10dif-ce-core.S | 282 CPU_LE( rev64 v7.16b, v7.16b ) 290 CPU_LE( ext v7.16b, v7.16b, v7.16b, #8 ) 305 // While >= 128 data bytes remain (not counting v0-v7), fold the 128 306 // bytes v0-v7 into them, storing the result back into v0-v7. 311 fold_32_bytes \p, v6, v7 316 // Now fold the 112 bytes in v0-v6 into the 16 bytes in v7 [all...] |
H A D | aes-ce-ccm-core.S | 93 ld1 {v7.16b-v8.16b}, [x9] 97 tbl v1.16b, {v1.16b}, v7.16b /* move keystream to end of register */ 98 eor v7.16b, v2.16b, v1.16b /* encrypt partial input block */ 99 bif v2.16b, v7.16b, v22.16b /* select plaintext */ 100 tbx v7.16b, {v6.16b}, v8.16b /* insert output from previous iteration */ 104 st1 {v7.16b}, [x0] /* store output block */
|
H A D | aes-neonbs-core.S | 385 ld1 {v7.4s}, [x1], #16 // load round 0 key 402 tbl v7.16b ,{v17.16b}, v16.16b 405 cmtst v0.16b, v7.16b, v8.16b 406 cmtst v1.16b, v7.16b, v9.16b 407 cmtst v2.16b, v7.16b, v10.16b 408 cmtst v3.16b, v7.16b, v11.16b 409 cmtst v4.16b, v7.16b, v12.16b 410 cmtst v5.16b, v7.16b, v13.16b 411 cmtst v6.16b, v7.16b, v14.16b 412 cmtst v7 [all...] |
H A D | sm4-neon-core.S | 274 ld4 {v4.4s-v7.4s}, [x2], #64 276 SM4_CRYPT_BLK8(v0, v1, v2, v3, v4, v5, v6, v7) 279 st1 {v4.16b-v7.16b}, [x1], #64 341 ld4 {v4.4s-v7.4s}, [x2] 343 SM4_CRYPT_BLK8_norotate(v0, v1, v2, v3, v4, v5, v6, v7) 347 rotate_clockwise_4x4(v4, v5, v6, v7) 362 eor v7.16b, v7.16b, RTMP6.16b 367 st1 {v4.16b-v7.16b}, [x1], #64 384 rev32 v7 [all...] |
H A D | sm4-ce-cipher-core.S | 22 ld1 {v4.4s-v7.4s}, [x0] 30 sm4e v8.4s, v7.4s
|
H A D | sm4-ce-core.S | 68 sm4ekey v7.4s, v6.4s, v31.4s; 74 st1 {v4.16b-v7.16b}, [x1]; 76 tbl v16.16b, {v7.16b}, v24.16b 122 ld1 {v4.16b-v7.16b}, [x2], #64; 124 SM4_CRYPT_BLK8(v0, v1, v2, v3, v4, v5, v6, v7); 127 st1 {v4.16b-v7.16b}, [x1], #64; 231 ld1 {v4.16b-v7.16b}, [x2], #64 240 rev32 v15.16b, v7.16b 256 mov RIV.16b, v7.16b 439 inc_le128(v7) /* [all...] |
H A D | chacha-neon-core.S | 124 ld1 {v4.16b-v7.16b}, [x2] 140 eor v3.16b, v3.16b, v7.16b 216 ld4r { v4.4s- v7.4s}, [x8], #16 227 mov a7, v7.s[0] 251 add v3.4s, v3.4s, v7.4s 291 eor v19.16b, v7.16b, v11.16b 297 shl v7.4s, v19.4s, #12 305 sri v7.4s, v19.4s, #20 318 add v3.4s, v3.4s, v7.4s 358 eor v19.16b, v7 [all...] |
H A D | sha3-ce-core.S | 47 ld1 { v4.1d- v7.1d}, [x8], #32 73 eor v7.8b, v7.8b, v25.8b 104 eor v7.8b, v7.8b, v25.8b 113 eor3 v27.16b, v2.16b, v7.16b, v12.16b 149 xar v26.2d, v7.2d, v26.2d, (64 - 6) 172 bcax v7.16b, v30.16b, v9.16b, v4.16b 192 st1 { v4.1d- v7.1d}, [x0], #32
|
H A D | aes-modes.S | 193 mov v7.16b, v2.16b 201 eor v3.16b, v3.16b, v7.16b 457 ld1 {v5.16b-v7.16b}, [IN], #48 464 eor v2.16b, v7.16b, v2.16b 510 ld1 {v7.16b}, [IN], x16 520 ST4( eor v7.16b, v7.16b, v1.16b ) 528 ST5( eor v7.16b, v7.16b, v2.16b ) 534 st1 {v7 [all...] |
H A D | sha2-ce-core.S | 82 ld1 { v4.4s- v7.4s}, [x8], #64 113 add_update 0, v7, 18, 19, 16, 17
|
/linux-master/security/apparmor/include/ |
H A D | policy_compat.h | 25 #define v7 7 macro
|
/linux-master/drivers/char/mwave/ |
H A D | mwavedd.h | 109 #define PRINTK_8(f,s,v1,v2,v3,v4,v5,v6,v7) \ 111 printk(s,v1,v2,v3,v4,v5,v6,v7); \ 122 #define PRINTK_8(f,s,v1,v2,v3,v4,v5,v6,v7)
|
/linux-master/drivers/gpu/drm/amd/display/dc/inc/ |
H A D | reg_helper.h | 105 f5, v5, f6, v6, f7, v7) \ 113 FN(reg, f7), v7) 116 f5, v5, f6, v6, f7, v7, f8, v8) \ 124 FN(reg, f7), v7,\ 128 v5, f6, v6, f7, v7, f8, v8, f9, v9) \ 136 FN(reg, f7), v7, \ 141 v5, f6, v6, f7, v7, f8, v8, f9, v9, f10, v10) \ 149 FN(reg, f7), v7, \ 195 #define REG_GET_7(reg_name, f1, v1, f2, v2, f3, v3, f4, v4, f5, v5, f6, v6, f7, v7) \ 203 FN(reg_name, f7), v7) [all...] |
/linux-master/arch/arm/mach-mvebu/ |
H A D | Makefile | 7 obj-y += cpu-reset.o board-v7.o coherency.o coherency_ll.o pmsu.o pmsu_ll.o
|
/linux-master/arch/arm64/boot/dts/marvell/ |
H A D | Makefile | 8 dtb-$(CONFIG_ARCH_MVEBU) += armada-3720-espressobin-v7.dtb 9 dtb-$(CONFIG_ARCH_MVEBU) += armada-3720-espressobin-v7-emmc.dtb
|
/linux-master/scripts/dtc/include-prefixes/arm64/marvell/ |
H A D | Makefile | 8 dtb-$(CONFIG_ARCH_MVEBU) += armada-3720-espressobin-v7.dtb 9 dtb-$(CONFIG_ARCH_MVEBU) += armada-3720-espressobin-v7-emmc.dtb
|
/linux-master/arch/arm/mm/ |
H A D | Makefile | 14 obj-$(CONFIG_ARM_MPU) += pmsa-v7.o pmsa-v8.o 38 obj-$(CONFIG_CPU_PABRT_V7) += pabort-v7.o 44 obj-$(CONFIG_CPU_CACHE_V7) += cache-v7.o 63 obj-$(CONFIG_CPU_TLB_V7) += tlb-v7.o 89 obj-$(CONFIG_CPU_V7) += proc-v7.o proc-v7-bugs.o
|
/linux-master/arch/powerpc/crypto/ |
H A D | crc32-vpmsum_core.S | 156 /* zero v0-v7 which will contain our checksums */ 164 vxor v7,v7,v7 299 vxor v7,v7,v15 341 vxor v7,v7,v15 354 vxor v7,v7,v1 [all...] |
H A D | chacha-p10le-8x.S | 38 # Column round (v0, v4, v8, v12, v1, v5, v9, v13, v2, v6, v10, v14, v3, v7, v11, v15) 39 # Diagnal round (v0, v5, v10, v15, v1, v6, v11, v12, v2, v7, v8, v13, v3, v4, v9, v14) 195 # QR(v0, v4, v8, v12, v1, v5, v9, v13, v2, v6, v10, v14, v3, v7, v11, v15) 292 # QR(v0, v5, v10, v15, v1, v6, v11, v12, v2, v7, v8, v13, v3, v4, v9, v14) 395 # QR(v0, v4, v8, v12, v1, v5, v9, v13, v2, v6, v10, v14, v3, v7, v11, v15) 437 # QR(v0, v5, v10, v15, v1, v6, v11, v12, v2, v7, v8, v13, v3, v4, v9, v14)
|
/linux-master/arch/riscv/crypto/ |
H A D | aes-macros.S | 70 vle32.v v7, (\keyp) 103 vaesem.vs \data, v7 140 vaesdm.vs \data, v7
|
H A D | chacha-riscv64-zvkb.S | 191 vmv.v.x v7, KEY3 211 v2, v6, v10, v14, v3, v7, v11, v15 214 v2, v7, v8, v13, v3, v4, v9, v14 230 vadd.vx v7, v7, KEY3 240 vxor.vv v23, v23, v7
|
/linux-master/drivers/cpuidle/ |
H A D | Makefile | 15 obj-$(CONFIG_ARM_MVEBU_V7_CPUIDLE) += cpuidle-mvebu-v7.o
|
/linux-master/arch/arm/include/asm/ |
H A D | glue-cache.h | 113 # define _CACHE v7
|
/linux-master/drivers/gpu/drm/amd/amdgpu/ |
H A D | atombios_crtc.c | 464 PIXEL_CLOCK_PARAMETERS_V7 v7; member in union:set_pixel_clock 706 args.v7.ulPixelClock = cpu_to_le32(clock * 10); /* 100 hz units */ 707 args.v7.ucMiscInfo = 0; 710 args.v7.ucMiscInfo |= PIXEL_CLOCK_V7_MISC_DVI_DUALLINK_EN; 711 args.v7.ucCRTC = crtc_id; 716 args.v7.ucDeepColorRatio = PIXEL_CLOCK_V7_DEEPCOLOR_RATIO_DIS; 719 args.v7.ucDeepColorRatio = PIXEL_CLOCK_V7_DEEPCOLOR_RATIO_5_4; 722 args.v7.ucDeepColorRatio = PIXEL_CLOCK_V7_DEEPCOLOR_RATIO_3_2; 725 args.v7.ucDeepColorRatio = PIXEL_CLOCK_V7_DEEPCOLOR_RATIO_2_1; 729 args.v7 [all...] |