Searched refs:v1 (Results 1 - 25 of 322) sorted by relevance

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/linux-master/arch/loongarch/lib/
H A Dxor_template.c17 unsigned long * __restrict v1, variable
24 LD_INOUT_LINE(v1)
26 ST_LINE(v1)
27 : : [v1] "r"(v1), [v2] "r"(v2) : "memory"
30 v1 += LINE_WIDTH / sizeof(unsigned long); variable
36 unsigned long * __restrict v1, variable
44 LD_INOUT_LINE(v1)
47 ST_LINE(v1)
48 : : [v1] "
51 v1 += LINE_WIDTH / sizeof(unsigned long); variable
58 unsigned long * __restrict v1, variable
76 v1 += LINE_WIDTH / sizeof(unsigned long); variable
84 unsigned long * __restrict v1, variable
104 v1 += LINE_WIDTH / sizeof(unsigned long); variable
[all...]
/linux-master/arch/riscv/boot/dts/starfive/
H A DMakefile4 DTC_FLAGS_jh7100-starfive-visionfive-v1 := -@
5 DTC_FLAGS_jh7110-starfive-visionfive-2-v1.2a := -@
6 DTC_FLAGS_jh7110-starfive-visionfive-2-v1.3b := -@
9 dtb-$(CONFIG_ARCH_STARFIVE) += jh7100-starfive-visionfive-v1.dtb
11 dtb-$(CONFIG_ARCH_STARFIVE) += jh7110-starfive-visionfive-2-v1.2a.dtb
12 dtb-$(CONFIG_ARCH_STARFIVE) += jh7110-starfive-visionfive-2-v1.3b.dtb
/linux-master/scripts/dtc/include-prefixes/riscv/starfive/
H A DMakefile4 DTC_FLAGS_jh7100-starfive-visionfive-v1 := -@
5 DTC_FLAGS_jh7110-starfive-visionfive-2-v1.2a := -@
6 DTC_FLAGS_jh7110-starfive-visionfive-2-v1.3b := -@
9 dtb-$(CONFIG_ARCH_STARFIVE) += jh7100-starfive-visionfive-v1.dtb
11 dtb-$(CONFIG_ARCH_STARFIVE) += jh7110-starfive-visionfive-2-v1.2a.dtb
12 dtb-$(CONFIG_ARCH_STARFIVE) += jh7110-starfive-visionfive-2-v1.3b.dtb
/linux-master/arch/s390/include/asm/
H A Dfpu-insn.h146 static __always_inline void fpu_vab(u8 v1, u8 v2, u8 v3) argument
148 asm volatile("VAB %[v1],%[v2],%[v3]"
150 : [v1] "I" (v1), [v2] "I" (v2), [v3] "I" (v3)
154 static __always_inline void fpu_vcksm(u8 v1, u8 v2, u8 v3) argument
156 asm volatile("VCKSM %[v1],%[v2],%[v3]"
158 : [v1] "I" (v1), [v2] "I" (v2), [v3] "I" (v3)
162 static __always_inline void fpu_vesravb(u8 v1, u8 v2, u8 v3) argument
164 asm volatile("VESRAVB %[v1],
170 fpu_vgfmag(u8 v1, u8 v2, u8 v3, u8 v4) argument
178 fpu_vgfmg(u8 v1, u8 v2, u8 v3) argument
188 fpu_vl(u8 v1, const void *vxr) argument
202 fpu_vl(u8 v1, const void *vxr) argument
243 fpu_vll(u8 v1, u32 index, const void *vxr) argument
261 fpu_vll(u8 v1, u32 index, const void *vxr) argument
317 fpu_vlr(u8 v1, u8 v2) argument
333 fpu_vn(u8 v1, u8 v2, u8 v3) argument
341 fpu_vperm(u8 v1, u8 v2, u8 v3, u8 v4) argument
349 fpu_vrepib(u8 v1, s16 i2) argument
357 fpu_vsrlb(u8 v1, u8 v2, u8 v3) argument
367 fpu_vst(u8 v1, const void *vxr) argument
380 fpu_vst(u8 v1, const void *vxr) argument
393 fpu_vstl(u8 v1, u32 index, const void *vxr) argument
409 fpu_vstl(u8 v1, u32 index, const void *vxr) argument
461 fpu_vupllf(u8 v1, u8 v2) argument
469 fpu_vx(u8 v1, u8 v2, u8 v3) argument
[all...]
H A Dfpu-insn-asm.h97 .ifc \vxr,%v1
198 * @v1: Vector register designated operand whose MSB is stored in
212 * correspond to @v1, @v2, @v3, and @v4. But there are exceptions, such as but
219 .macro RXB rxb v1 v2=0 v3=0 v4=0
221 .if \v1 & 0x10
238 * @v1: First vector register designated operand (for RXB)
243 * Note: For @v1, @v2, @v3, and @v4 also refer to the RXB macro
246 .macro MRXB m v1 v2=0 v3=0 v4=0
248 RXB rxb, \v1, \v2, \v3, \v4 variable
256 * @v1
265 MRXB \\m, \\v1, \\v2, \\v3, \\v4 variable
287 VX_NUM v1, \\v variable
309 VX_NUM v1, \\v1 variable
313 MRXBOPC 0, 0x56, v1, v2 variable
318 VX_NUM v1, \\v variable
328 VX_NUM v1, \\vr1 variable
350 VX_NUM v1, \\vr1 variable
397 MRXBOPC \\hint, 0x36, v1, v3 variable
402 VX_NUM v1, \\vr1 variable
417 MRXBOPC \\hint, 0x3E, v1, v3 variable
422 VX_NUM v1, \\vr1 variable
433 VX_NUM v1, \\vr1 variable
437 MRXBOPC \\m3, 0xD4, v1, v2 variable
451 VX_NUM v1, \\vr1 variable
456 MRXBOPC \\m4, 0x84, v1, v2, v3 variable
461 VX_NUM v1, \\vr1 variable
465 MRXBOPC \\m4, 0x4D, v1, v3 variable
482 VX_NUM v1, \\vr1 variable
487 MRXBOPC \\m4, 0x61, v1, v2, v3 variable
504 VX_NUM v1, \\vr1 variable
509 MRXBOPC \\m4, 0x60, v1, v2, v3 variable
526 VX_NUM v1, \\v variable
536 VX_NUM v1, \\v variable
548 VX_NUM v1, \\vr1 variable
558 VX_NUM v1, \\vr1 variable
568 VX_NUM v1, \\vr1 variable
578 VX_NUM v1, \\vr1 variable
583 MRXBOPC \\m4, 0xB4, v1, v2, v3 variable
600 VX_NUM v1, \\vr1 variable
623 VX_NUM v1, \\vr1 variable
633 VX_NUM v1, \\vr1 variable
653 VX_NUM v1, \\vr1 variable
658 MRXBOPC \\m4, 0xF3, v1, v2, v3 variable
678 VX_NUM v1, \\vr1 variable
683 MRXBOPC \\m4, 0x7A, v1, v2, v3 variable
701 VX_NUM v1, \\vr1 variable
706 MRXBOPC \\m4, 0x33, v1, v3 variable
723 VX_NUM v1, \\vr1 variable
[all...]
/linux-master/arch/riscv/crypto/
H A Dsm4-riscv64-zvksed-zvkb.S57 vle32.v v1, (a0)
58 vrev8.v v1, v1
63 vxor.vv v1, v1, v2
71 vsm4k.vi v1, v1, i
72 vse32.v v1, (a1) // Store to rkey_enc.
73 vsse32.v v1, (a2), t0 // Store to rkey_dec.
89 vle32.v v1, (a
[all...]
H A Dghash-riscv64-zvkg.S61 vle32.v v1, (ACCUMULATOR)
65 vghsh.vv v1, v2, v3
70 vse32.v v1, (ACCUMULATOR)
/linux-master/drivers/char/mwave/
H A Dmwavedd.h79 #define PRINTK_2(f,s,v1) \
81 printk(s,v1); \
84 #define PRINTK_3(f,s,v1,v2) \
86 printk(s,v1,v2); \
89 #define PRINTK_4(f,s,v1,v2,v3) \
91 printk(s,v1,v2,v3); \
94 #define PRINTK_5(f,s,v1,v2,v3,v4) \
96 printk(s,v1,v2,v3,v4); \
99 #define PRINTK_6(f,s,v1,v2,v3,v4,v5) \
101 printk(s,v1,v
[all...]
/linux-master/arch/powerpc/lib/
H A Dxor_vmx.c56 DEFINE(v1);
61 LOAD(v1);
63 XOR(v1, v2);
64 STORE(v1);
66 v1 += 4;
76 DEFINE(v1);
82 LOAD(v1);
85 XOR(v1, v2);
86 XOR(v1, v3);
87 STORE(v1);
[all...]
/linux-master/include/pcmcia/
H A Ddevice_id.h24 #define PCMCIA_DEVICE_PROD_ID1(v1, vh1) { \
26 .prod_id = { (v1), NULL, NULL, NULL }, \
39 #define PCMCIA_DEVICE_PROD_ID12(v1, v2, vh1, vh2) { \
42 .prod_id = { (v1), (v2), NULL, NULL }, \
45 #define PCMCIA_DEVICE_PROD_ID13(v1, v3, vh1, vh3) { \
48 .prod_id = { (v1), NULL, (v3), NULL }, \
51 #define PCMCIA_DEVICE_PROD_ID14(v1, v4, vh1, vh4) { \
54 .prod_id = { (v1), NULL, NULL, (v4) }, \
57 #define PCMCIA_DEVICE_PROD_ID123(v1, v2, v3, vh1, vh2, vh3) { \
61 .prod_id = { (v1), (v
[all...]
/linux-master/drivers/staging/media/atomisp/pci/isp/kernels/xnr/xnr_3.0/
H A Dia_css_xnr3_types.h55 int v1; /** Sigma for V range similarity in bright area */ member in struct:ia_css_xnr3_sigma_params
70 int v1; /** Coring threshold of V channel in bright area */ member in struct:ia_css_xnr3_coring_params
/linux-master/drivers/gpu/drm/amd/amdgpu/
H A Ddf_v4_3.c32 uint32_t v0, v1, v28, v31; local
41 v1 = REG_GET_FIELD(hw_assert_msklo,
48 if (v0 && v1 && v28 && v31)
50 else if (!v0 && !v1 && !v28 && !v31)
54 v0, v1, v28, v31);
/linux-master/net/ceph/
H A Dmessenger_v1.c112 BUG_ON(con->v1.out_skip);
114 con->v1.out_kvec_left = 0;
115 con->v1.out_kvec_bytes = 0;
116 con->v1.out_kvec_cur = &con->v1.out_kvec[0];
122 int index = con->v1.out_kvec_left;
124 BUG_ON(con->v1.out_skip);
125 BUG_ON(index >= ARRAY_SIZE(con->v1.out_kvec));
127 con->v1.out_kvec[index].iov_len = size;
128 con->v1
[all...]
/linux-master/tools/testing/selftests/powerpc/math/
H A Dvmx_asm.S9 # Should be safe from C, only touches r4, r5 and v0,v1,v2
16 vcmpequd. v1,v0,v20
17 vmr v2,v1
21 vcmpequd. v1,v0,v21
22 vand v2,v2,v1
26 vcmpequd. v1,v0,v22
27 vand v2,v2,v1
31 vcmpequd. v1,v0,v23
32 vand v2,v2,v1
36 vcmpequd. v1,v
[all...]
/linux-master/arch/arm64/crypto/
H A Daes-ce-core.S14 ld1 {v1.4s}, [x0], #16
18 mov v3.16b, v1.16b
20 0: mov v2.16b, v1.16b
24 2: ld1 {v1.4s}, [x0], #16
29 aese v0.16b, v1.16b
42 ld1 {v1.4s}, [x0], #16
46 mov v3.16b, v1.16b
48 0: mov v2.16b, v1.16b
52 2: ld1 {v1.4s}, [x0], #16
57 aesd v0.16b, v1
[all...]
/linux-master/tools/power/cpupower/debug/kernel/
H A Dcpufreq-test_tsc.c37 u32 v1=0,v2=0,v3=0; local
44 v1 = inl(pm_tmr_ioport);
47 } while ((v1 > v2 && v1 < v3) || (v2 > v3 && v2 < v1)
48 || (v3 > v1 && v3 < v2));
/linux-master/arch/arm64/lib/
H A Dxor-neon.c19 register uint64x2_t v0, v1, v2, v3; local
25 v1 = veorq_u64(vld1q_u64(dp1 + 2), vld1q_u64(dp2 + 2));
31 vst1q_u64(dp1 + 2, v1);
48 register uint64x2_t v0, v1, v2, v3; local
54 v1 = veorq_u64(vld1q_u64(dp1 + 2), vld1q_u64(dp2 + 2));
60 v1 = veorq_u64(v1, vld1q_u64(dp3 + 2));
66 vst1q_u64(dp1 + 2, v1);
86 register uint64x2_t v0, v1, v2, v3; local
92 v1
133 register uint64x2_t v0, v1, v2, v3; local
203 register uint64x2_t v0, v1, v2, v3; local
240 register uint64x2_t v0, v1, v2, v3; local
286 register uint64x2_t v0, v1, v2, v3; local
[all...]
/linux-master/tools/testing/selftests/bpf/
H A Dtest_xdp_features.sh16 ip link add v1 type veth peer name v0 netns ${NS}
18 ip link set v1 up
19 ip addr add $V1_IP4/24 dev v1
20 ip addr add $V1_IP6/64 nodad dev v1
26 ethtool -K v1 gro on
27 ethtool -K v1 tx-checksumming off
34 ip link del v1 2> /dev/null
50 ./xdp_features -f XDP_PASS -D $V1_IP6 -T $V0_IP6 v1 &
58 ./xdp_features -f XDP_DROP -D ::ffff:$V1_IP4 -T ::ffff:$V0_IP4 v1 &
67 ./xdp_features -f XDP_ABORTED -D $V1_IP6 -T $V0_IP6 v1
[all...]
/linux-master/lib/
H A Datomic64_test.c107 int v1 = 0xdeadbeef; local
118 TEST(, or, |=, v1);
119 TEST(, and, &=, v1);
120 TEST(, xor, ^=, v1);
121 TEST(, andnot, &= ~, v1);
133 FETCH_FAMILY_TEST(, fetch_or, |=, v1);
134 FETCH_FAMILY_TEST(, fetch_and, &=, v1);
135 FETCH_FAMILY_TEST(, fetch_andnot, &= ~, v1);
136 FETCH_FAMILY_TEST(, fetch_xor, ^=, v1);
141 XCHG_FAMILY_TEST(, v0, v1);
150 long long v1 = 0xdeadbeefdeafcafeLL; local
[all...]
/linux-master/drivers/staging/rtl8723bs/hal/
H A DHalHWImg8723B_MAC.c196 u32 v1 = Array[i]; local
200 if (v1 < 0x40000000) {
201 odm_ConfigMAC_8723B(pDM_Odm, v1, (u8)v2);
206 u8 cCond = (u8)((v1 & (BIT29|BIT28)) >> 28);
210 READ_NEXT_PAIR(v1, v2, i);
211 } else if (!CheckPositive(pDM_Odm, v1, v2)) {
213 READ_NEXT_PAIR(v1, v2, i);
214 READ_NEXT_PAIR(v1, v2, i);
216 READ_NEXT_PAIR(v1, v2, i);
217 if (!CheckNegative(pDM_Odm, v1, v
[all...]
/linux-master/drivers/gpu/drm/amd/display/dmub/src/
H A Ddmub_reg.h65 #define REG_SET_2(reg, init_value, f1, v1, f2, v2) \
67 FN(reg, f1), v1, \
70 #define REG_SET_3(reg, init_value, f1, v1, f2, v2, f3, v3) \
72 FN(reg, f1), v1, \
76 #define REG_SET_4(reg, init_value, f1, v1, f2, v2, f3, v3, f4, v4) \
78 FN(reg, f1), v1, \
92 #define REG_UPDATE_2(reg, f1, v1, f2, v2) \
94 FN(reg, f1), v1,\
97 #define REG_UPDATE_3(reg, f1, v1, f2, v2, f3, v3) \
99 FN(reg, f1), v1, \
[all...]
/linux-master/arch/mips/kernel/
H A Dr4k-bugs64.c44 void mult_sh_align_mod(long *v1, long *v2, long *w, argument
114 *v1 = lv1;
121 long v1[8], v2[8], w[8]; local
135 mult_sh_align_mod(&v1[0], &v2[0], &w[0], 32, 0);
136 mult_sh_align_mod(&v1[1], &v2[1], &w[1], 32, 1);
137 mult_sh_align_mod(&v1[2], &v2[2], &w[2], 32, 2);
138 mult_sh_align_mod(&v1[3], &v2[3], &w[3], 32, 3);
139 mult_sh_align_mod(&v1[4], &v2[4], &w[4], 32, 4);
140 mult_sh_align_mod(&v1[5], &v2[5], &w[5], 32, 5);
141 mult_sh_align_mod(&v1[
[all...]
/linux-master/drivers/gpu/drm/amd/display/dc/dml/calcs/
H A Ddcn_calc_math.c94 float dcn_bw_max3(float v1, float v2, float v3) argument
96 return v3 > dcn_bw_max2(v1, v2) ? v3 : dcn_bw_max2(v1, v2);
99 float dcn_bw_max5(float v1, float v2, float v3, float v4, float v5) argument
101 return dcn_bw_max3(v1, v2, v3) > dcn_bw_max2(v4, v5) ? dcn_bw_max3(v1, v2, v3) : dcn_bw_max2(v4, v5);
/linux-master/drivers/gpu/drm/amd/display/dc/inc/
H A Ddcn_calc_math.h37 float dcn_bw_max3(float v1, float v2, float v3);
38 float dcn_bw_max5(float v1, float v2, float v3, float v4, float v5);
H A Dreg_helper.h67 #define REG_SET_2(reg, init_value, f1, v1, f2, v2) \
69 FN(reg, f1), v1,\
72 #define REG_SET_3(reg, init_value, f1, v1, f2, v2, f3, v3) \
74 FN(reg, f1), v1,\
78 #define REG_SET_4(reg, init_value, f1, v1, f2, v2, f3, v3, f4, v4) \
80 FN(reg, f1), v1,\
85 #define REG_SET_5(reg, init_value, f1, v1, f2, v2, f3, v3, f4, v4, \
88 FN(reg, f1), v1,\
94 #define REG_SET_6(reg, init_value, f1, v1, f2, v2, f3, v3, f4, v4, \
97 FN(reg, f1), v1,\
[all...]

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