Searched refs:timings (Results 1 - 14 of 14) sorted by relevance

/freebsd-11-stable/tools/regression/environ/
H A DMakefile.timings4 SRCS= timings.c
5 PROG= timings
16 @./timings
H A DMakefile4 PROGS= envctl retention timings
/freebsd-11-stable/sys/dev/ata/chipsets/
H A Data-ite.c101 /* set default active & recover timings */
133 uint8_t *timings = (uint8_t*)(&ctlr->chipset_data); local
164 timings[devno] = chtiming[ata_mode2idx(piomode)];
167 max(timings[ch->unit << 1], timings[(ch->unit << 1) + 1]), 1);
184 static const uint8_t timings[] = local
196 /* Enable/disable UDMA and set timings. */
218 /* Set PIO/WDMA timings. */
222 new40 = timings[ata_mode2idx(piomode)] << 8;
227 new44 = ((timings[ata_mode2id
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H A Data-sis.c264 static const uint32_t timings[] = local
271 pci_write_config(parent, reg, timings[ata_mode2idx(mode)], 4);
275 static const uint16_t timings[] = local
281 pci_write_config(parent, reg, timings[ata_mode2idx(mode)], 2);
285 static const uint16_t timings[] = local
290 pci_write_config(parent, reg, timings[ata_mode2idx(mode)], 2);
296 static const uint16_t timings[] = local
301 pci_write_config(parent, reg, timings[ata_mode2idx(mode)], 2);
H A Data-amd.c115 static const uint8_t timings[] = local
129 /* Set UDMA timings. */
137 /* Set WDMA/PIO timings. */
138 pci_write_config(parent, reg - 0x08, timings[ata_mode2idx(piomode)], 1);
H A Data-nvidia.c329 static const uint8_t timings[] = local
344 pci_write_config(parent, reg - 0x08, timings[ata_mode2idx(piomode)], 1);
H A Data-intel.c488 static const uint8_t timings[] = local
503 /* Enable/disable UDMA and set timings. */
526 /* Set PIO/WDMA timings. */
529 new40 = timings[ata_mode2idx(piomode)] << 8;
532 new44 = ((timings[ata_mode2idx(piomode)] & 0x30) >> 2) |
533 (timings[ata_mode2idx(piomode)] & 0x03);
H A Data-via.c351 static const uint8_t timings[] = local
360 /* Set UDMA timings */
369 /* Set WDMA/PIO timings */
370 pci_write_config(parent, reg - 0x08,timings[ata_mode2idx(piomode)], 1);
H A Data-promise.c460 static const uint32_t timings[][2] = { local
513 timings[ata_mode2idx(mode)][ctlr->chip->cfg1], 4);
/freebsd-11-stable/crypto/openssl/crypto/ec/
H A Dectest.c118 static void timings(EC_GROUP *group, int type, BN_CTX *ctx)
1016 timings(P_160, TIMING_BASE_PT, ctx);
1017 timings(P_160, TIMING_RAND_PT, ctx);
1018 timings(P_160, TIMING_SIMUL, ctx);
1019 timings(P_192, TIMING_BASE_PT, ctx);
1020 timings(P_192, TIMING_RAND_PT, ctx);
1021 timings(P_192, TIMING_SIMUL, ctx);
1022 timings(P_224, TIMING_BASE_PT, ctx);
1023 timings(P_224, TIMING_RAND_PT, ctx);
1024 timings(P_22
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/freebsd-11-stable/sys/dev/mmc/
H A Dmmc.c100 uint32_t timings; /* Mask of bus timings supported */ member in struct:mmc_ivars
101 uint32_t vccq_120; /* Mask of bus timings at VCCQ of 1.2 V */
102 uint32_t vccq_180; /* Mask of bus timings at VCCQ of 1.8 V */
1572 if (isset(&ivar->timings, timing)) {
1640 setbit(&ivar->timings, bus_timing_normal);
1711 setbit(&ivar->timings, bus_timing_hs);
1812 setbit(&ivar->timings, bus_timing_hs);
1815 setbit(&ivar->timings, bus_timing_hs);
1820 setbit(&ivar->timings, bus_timing_mmc_ddr5
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/freebsd-11-stable/sys/dev/drm2/
H A Ddrm_edid.h143 struct std_timing timings[6]; member in union:detailed_non_pixel::__anon9870
233 /* Est. timings and mfg rsvd timings*/
235 /* Standard timings 1-8*/
237 /* Detailing timings 1-4 */
H A Ddrm_edid.c72 /* Force reduced-blanking timings for detailed modes */
722 * 0 is reserved. The spec says 0x01 fill for unused timings. Some old
852 * HDTV detailed timings are encoded as field height.
1330 std = &data->data.timings[i];
1474 * add_detailed_modes - Add modes from detailed timings
/freebsd-11-stable/sys/dev/usb/
H A Dusb_debug.c75 * Sysctls to modify timings/delays
77 static SYSCTL_NODE(_hw_usb, OID_AUTO, timings, CTLFLAG_RW, 0, "Timings");
236 * This function updates timings variables, adjusting them where necessary.

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