Searched refs:t7xx_dev (Results 1 - 22 of 22) sorted by relevance

/linux-master/drivers/net/wwan/t7xx/
H A Dt7xx_pcie_mac.h21 #define IREG_BASE(t7xx_dev) ((t7xx_dev)->base_addr.pcie_mac_ireg_base)
23 void t7xx_pcie_mac_interrupts_en(struct t7xx_pci_dev *t7xx_dev);
24 void t7xx_pcie_mac_interrupts_dis(struct t7xx_pci_dev *t7xx_dev);
25 void t7xx_pcie_mac_atr_init(struct t7xx_pci_dev *t7xx_dev);
26 void t7xx_pcie_mac_clear_int(struct t7xx_pci_dev *t7xx_dev, enum t7xx_int int_type);
27 void t7xx_pcie_mac_set_int(struct t7xx_pci_dev *t7xx_dev, enum t7xx_int int_type);
28 void t7xx_pcie_mac_clear_int_status(struct t7xx_pci_dev *t7xx_dev, enum t7xx_int int_type);
29 void t7xx_pcie_set_mac_msix_cfg(struct t7xx_pci_dev *t7xx_dev, unsigned int irq_count);
H A Dt7xx_mhccif.c32 static void t7xx_mhccif_clear_interrupts(struct t7xx_pci_dev *t7xx_dev, u32 mask) argument
34 void __iomem *mhccif_pbase = t7xx_dev->base_addr.mhccif_rc_base;
39 t7xx_mhccif_read_sw_int_sts(t7xx_dev);
41 t7xx_pcie_mac_clear_int_status(t7xx_dev, MHCCIF_INT);
46 struct t7xx_pci_dev *t7xx_dev = data; local
50 iowrite32(val, IREG_BASE(t7xx_dev) + DISABLE_ASPM_LOWPWR);
52 int_status = t7xx_mhccif_read_sw_int_sts(t7xx_dev);
54 int ret = t7xx_pci_mhccif_isr(t7xx_dev);
57 dev_err(&t7xx_dev->pdev->dev, "PCI MHCCIF ISR failure: %d", ret);
60 t7xx_mhccif_clear_interrupts(t7xx_dev, int_statu
80 t7xx_mhccif_read_sw_int_sts(struct t7xx_pci_dev *t7xx_dev) argument
85 t7xx_mhccif_mask_set(struct t7xx_pci_dev *t7xx_dev, u32 val) argument
90 t7xx_mhccif_mask_clr(struct t7xx_pci_dev *t7xx_dev, u32 val) argument
95 t7xx_mhccif_mask_get(struct t7xx_pci_dev *t7xx_dev) argument
105 t7xx_mhccif_init(struct t7xx_pci_dev *t7xx_dev) argument
116 t7xx_mhccif_h2d_swint_trigger(struct t7xx_pci_dev *t7xx_dev, u32 channel) argument
[all...]
H A Dt7xx_mhccif.h31 void t7xx_mhccif_mask_set(struct t7xx_pci_dev *t7xx_dev, u32 val);
32 void t7xx_mhccif_mask_clr(struct t7xx_pci_dev *t7xx_dev, u32 val);
33 u32 t7xx_mhccif_mask_get(struct t7xx_pci_dev *t7xx_dev);
34 void t7xx_mhccif_init(struct t7xx_pci_dev *t7xx_dev);
35 u32 t7xx_mhccif_read_sw_int_sts(struct t7xx_pci_dev *t7xx_dev);
36 void t7xx_mhccif_h2d_swint_trigger(struct t7xx_pci_dev *t7xx_dev, u32 channel);
H A Dt7xx_pci.c70 struct t7xx_pci_dev *t7xx_dev; local
75 t7xx_dev = pci_get_drvdata(pdev);
76 if (!t7xx_dev)
81 WRITE_ONCE(t7xx_dev->mode, T7XX_FASTBOOT_SWITCHING);
83 WRITE_ONCE(t7xx_dev->mode, T7XX_RESET);
84 t7xx_acpi_pldr_func(t7xx_dev);
95 struct t7xx_pci_dev *t7xx_dev; local
99 t7xx_dev = pci_get_drvdata(pdev);
100 if (!t7xx_dev)
103 mode = READ_ONCE(t7xx_dev
121 t7xx_mode_update(struct t7xx_pci_dev *t7xx_dev, enum t7xx_mode mode) argument
137 t7xx_dev_set_sleep_capability(struct t7xx_pci_dev *t7xx_dev, bool enable) argument
152 t7xx_wait_pm_config(struct t7xx_pci_dev *t7xx_dev) argument
166 t7xx_pci_pm_init(struct t7xx_pci_dev *t7xx_dev) argument
189 t7xx_pci_pm_init_late(struct t7xx_pci_dev *t7xx_dev) argument
207 t7xx_pci_pm_reinit(struct t7xx_pci_dev *t7xx_dev) argument
220 t7xx_pci_pm_exp_detected(struct t7xx_pci_dev *t7xx_dev) argument
227 t7xx_pci_pm_entity_register(struct t7xx_pci_dev *t7xx_dev, struct md_pm_entity *pm_entity) argument
244 t7xx_pci_pm_entity_unregister(struct t7xx_pci_dev *t7xx_dev, struct md_pm_entity *pm_entity) argument
262 t7xx_pci_sleep_disable_complete(struct t7xx_pci_dev *t7xx_dev) argument
284 t7xx_pci_disable_sleep(struct t7xx_pci_dev *t7xx_dev) argument
319 t7xx_pci_enable_sleep(struct t7xx_pci_dev *t7xx_dev) argument
335 t7xx_send_pm_request(struct t7xx_pci_dev *t7xx_dev, u32 request) argument
352 struct t7xx_pci_dev *t7xx_dev; local
422 t7xx_pcie_interrupt_reinit(struct t7xx_pci_dev *t7xx_dev) argument
436 t7xx_pcie_reinit(struct t7xx_pci_dev *t7xx_dev, bool is_d3) argument
455 t7xx_send_fsm_command(struct t7xx_pci_dev *t7xx_dev, u32 event) argument
486 struct t7xx_pci_dev *t7xx_dev; local
598 struct t7xx_pci_dev *t7xx_dev; local
614 struct t7xx_pci_dev *t7xx_dev; local
666 struct t7xx_pci_dev *t7xx_dev; local
707 t7xx_setup_msix(struct t7xx_pci_dev *t7xx_dev) argument
729 t7xx_interrupt_init(struct t7xx_pci_dev *t7xx_dev) argument
747 t7xx_pci_infracfg_ao_calc(struct t7xx_pci_dev *t7xx_dev) argument
756 struct t7xx_pci_dev *t7xx_dev; local
834 struct t7xx_pci_dev *t7xx_dev; local
[all...]
H A Dt7xx_pci.h120 int (*suspend)(struct t7xx_pci_dev *t7xx_dev, void *entity_param);
121 void (*suspend_late)(struct t7xx_pci_dev *t7xx_dev, void *entity_param);
122 void (*resume_early)(struct t7xx_pci_dev *t7xx_dev, void *entity_param);
123 int (*resume)(struct t7xx_pci_dev *t7xx_dev, void *entity_param);
128 void t7xx_pci_disable_sleep(struct t7xx_pci_dev *t7xx_dev);
129 void t7xx_pci_enable_sleep(struct t7xx_pci_dev *t7xx_dev);
130 int t7xx_pci_sleep_disable_complete(struct t7xx_pci_dev *t7xx_dev);
131 int t7xx_pci_pm_entity_register(struct t7xx_pci_dev *t7xx_dev, struct md_pm_entity *pm_entity);
132 int t7xx_pci_pm_entity_unregister(struct t7xx_pci_dev *t7xx_dev, struct md_pm_entity *pm_entity);
133 void t7xx_pci_pm_init_late(struct t7xx_pci_dev *t7xx_dev);
[all...]
H A Dt7xx_modem_ops.h67 struct t7xx_pci_dev *t7xx_dev; member in struct:t7xx_modem
83 int t7xx_md_reset(struct t7xx_pci_dev *t7xx_dev);
84 int t7xx_md_init(struct t7xx_pci_dev *t7xx_dev);
85 void t7xx_md_exit(struct t7xx_pci_dev *t7xx_dev);
86 void t7xx_clear_rgu_irq(struct t7xx_pci_dev *t7xx_dev);
87 int t7xx_acpi_fldr_func(struct t7xx_pci_dev *t7xx_dev);
88 int t7xx_acpi_pldr_func(struct t7xx_pci_dev *t7xx_dev);
89 int t7xx_pci_mhccif_isr(struct t7xx_pci_dev *t7xx_dev);
H A Dt7xx_modem_ops.c65 static unsigned int t7xx_get_interrupt_status(struct t7xx_pci_dev *t7xx_dev) argument
67 return t7xx_mhccif_read_sw_int_sts(t7xx_dev) & D2H_SW_INT_MASK;
72 * @t7xx_dev: MTK device.
80 int t7xx_pci_mhccif_isr(struct t7xx_pci_dev *t7xx_dev) argument
82 struct t7xx_modem *md = t7xx_dev->md;
90 dev_err_ratelimited(&t7xx_dev->pdev->dev,
96 int_sta = t7xx_get_interrupt_status(t7xx_dev);
113 mask = t7xx_mhccif_mask_get(t7xx_dev);
124 static void t7xx_clr_device_irq_via_pcie(struct t7xx_pci_dev *t7xx_dev) argument
126 struct t7xx_addr_base *pbase_addr = &t7xx_dev
136 t7xx_clear_rgu_irq(struct t7xx_pci_dev *t7xx_dev) argument
144 t7xx_acpi_reset(struct t7xx_pci_dev *t7xx_dev, char *fn_name) argument
175 t7xx_acpi_fldr_func(struct t7xx_pci_dev *t7xx_dev) argument
180 t7xx_acpi_pldr_func(struct t7xx_pci_dev *t7xx_dev) argument
185 t7xx_reset_device_via_pmic(struct t7xx_pci_dev *t7xx_dev) argument
198 struct t7xx_pci_dev *t7xx_dev = data; local
208 struct t7xx_pci_dev *t7xx_dev = data; local
221 t7xx_pcie_register_rgu_isr(struct t7xx_pci_dev *t7xx_dev) argument
299 struct t7xx_pci_dev *t7xx_dev = md->t7xx_dev; local
331 t7xx_md_sys_sw_init(struct t7xx_pci_dev *t7xx_dev) argument
644 t7xx_md_alloc(struct t7xx_pci_dev *t7xx_dev) argument
674 t7xx_md_reset(struct t7xx_pci_dev *t7xx_dev) argument
699 t7xx_md_init(struct t7xx_pci_dev *t7xx_dev) argument
765 t7xx_md_exit(struct t7xx_pci_dev *t7xx_dev) argument
[all...]
H A Dt7xx_pcie_mac.c82 static int t7xx_pcie_mac_atr_cfg(struct t7xx_pci_dev *t7xx_dev, struct t7xx_atr_config *cfg) argument
84 struct device *dev = &t7xx_dev->pdev->dev;
85 void __iomem *pbase = IREG_BASE(t7xx_dev);
131 * @t7xx_dev: MTK device.
135 void t7xx_pcie_mac_atr_init(struct t7xx_pci_dev *t7xx_dev) argument
142 t7xx_pcie_mac_atr_tables_dis(IREG_BASE(t7xx_dev), i);
146 cfg.src_addr = pci_resource_start(t7xx_dev->pdev, T7XX_PCIE_REG_BAR);
152 t7xx_pcie_mac_atr_tables_dis(IREG_BASE(t7xx_dev), cfg.port);
153 t7xx_pcie_mac_atr_cfg(t7xx_dev, &cfg);
155 t7xx_dev
178 t7xx_pcie_mac_enable_disable_int(struct t7xx_pci_dev *t7xx_dev, bool enable) argument
192 t7xx_pcie_mac_interrupts_en(struct t7xx_pci_dev *t7xx_dev) argument
197 t7xx_pcie_mac_interrupts_dis(struct t7xx_pci_dev *t7xx_dev) argument
210 t7xx_pcie_mac_clear_set_int(struct t7xx_pci_dev *t7xx_dev, enum t7xx_int int_type, bool clear) argument
225 t7xx_pcie_mac_clear_int(struct t7xx_pci_dev *t7xx_dev, enum t7xx_int int_type) argument
230 t7xx_pcie_mac_set_int(struct t7xx_pci_dev *t7xx_dev, enum t7xx_int int_type) argument
242 t7xx_pcie_mac_clear_int_status(struct t7xx_pci_dev *t7xx_dev, enum t7xx_int int_type) argument
257 t7xx_pcie_set_mac_msix_cfg(struct t7xx_pci_dev *t7xx_dev, unsigned int irq_count) argument
[all...]
H A Dt7xx_netdev.h43 struct t7xx_pci_dev *t7xx_dev; member in struct:t7xx_ccmni_ctrl
57 int t7xx_ccmni_init(struct t7xx_pci_dev *t7xx_dev);
58 void t7xx_ccmni_exit(struct t7xx_pci_dev *t7xx_dev);
H A Dt7xx_netdev.c392 static void init_md_status_notifier(struct t7xx_pci_dev *t7xx_dev) argument
394 struct t7xx_ccmni_ctrl *ctlb = t7xx_dev->ccmni_ctlb;
402 t7xx_fsm_notifier_register(t7xx_dev->md, md_status_notifier);
460 static void t7xx_ccmni_queue_state_notify(struct t7xx_pci_dev *t7xx_dev, argument
463 struct t7xx_ccmni_ctrl *ctlb = t7xx_dev->ccmni_ctlb;
469 dev_warn(&t7xx_dev->pdev->dev, "No netdev registered yet\n");
479 int t7xx_ccmni_init(struct t7xx_pci_dev *t7xx_dev) argument
481 struct device *dev = &t7xx_dev->pdev->dev;
488 t7xx_dev->ccmni_ctlb = ctlb;
489 ctlb->t7xx_dev
503 t7xx_ccmni_exit(struct t7xx_pci_dev *t7xx_dev) argument
[all...]
H A Dt7xx_state_monitor.c54 20000000, false, IREG_BASE(md->t7xx_dev) + \
125 struct device *dev = &ctl->md->t7xx_dev->pdev->dev;
179 struct device *dev = &ctl->md->t7xx_dev->pdev->dev;
198 t7xx_pci_pm_exp_detected(ctl->md->t7xx_dev);
220 value = ioread32(IREG_BASE(md->t7xx_dev) + T7XX_PCIE_MISC_DEV_STATUS);
223 iowrite32(value, IREG_BASE(md->t7xx_dev) + T7XX_PCIE_MISC_DEV_STATUS);
234 dev = &md->t7xx_dev->pdev->dev;
254 t7xx_mode_update(md->t7xx_dev, T7XX_FASTBOOT_DOWNLOAD);
256 t7xx_mode_update(md->t7xx_dev, T7XX_FASTBOOT_DUMP);
270 return t7xx_md_reset(ctl->md->t7xx_dev);
286 struct t7xx_pci_dev *t7xx_dev = ctl->md->t7xx_dev; local
[all...]
H A Dt7xx_hif_dpmaif.c65 t7xx_pcie_mac_set_int(dpmaif_ctrl->t7xx_dev, isr_para->pcie_int);
76 t7xx_pcie_mac_clear_int(dpmaif_ctrl->t7xx_dev, isr_para->pcie_int);
96 t7xx_pcie_mac_clear_int_status(dpmaif_ctrl->t7xx_dev, isr_para->pcie_int);
154 t7xx_pcie_mac_clear_int(dpmaif_ctrl->t7xx_dev, isr_para->pcie_int);
165 t7xx_pcie_mac_set_int(dpmaif_ctrl->t7xx_dev, isr_para->pcie_int);
187 struct t7xx_pci_dev *t7xx_dev = dpmaif_ctrl->t7xx_dev; local
197 t7xx_pcie_mac_clear_int(t7xx_dev, int_type);
199 t7xx_dev->intr_handler[int_type] = t7xx_dpmaif_isr_handler;
200 t7xx_dev
410 t7xx_dpmaif_suspend(struct t7xx_pci_dev *t7xx_dev, void *param) argument
447 t7xx_dpmaif_resume(struct t7xx_pci_dev *t7xx_dev, void *param) argument
535 t7xx_dpmaif_hif_init(struct t7xx_pci_dev *t7xx_dev, struct dpmaif_callbacks *callbacks) argument
[all...]
H A Dt7xx_port_proxy.c172 struct t7xx_fsm_ctl *ctl = port->t7xx_dev->md->fsm_ctl;
241 md_ctrl = port->t7xx_dev->md->md_ctrl[path_id];
251 md_ctrl = port->t7xx_dev->md->md_ctrl[path_id];
305 struct t7xx_fsm_ctl *ctl = port->t7xx_dev->md->fsm_ctl;
371 struct t7xx_pci_dev *t7xx_dev = queue->md_ctrl->t7xx_dev; local
372 struct port_proxy *port_prox = t7xx_dev->md->port_prox;
393 static struct t7xx_port *t7xx_port_proxy_find_port(struct t7xx_pci_dev *t7xx_dev, argument
396 struct port_proxy *port_prox = t7xx_dev->md->port_prox;
426 struct t7xx_pci_dev *t7xx_dev local
[all...]
H A Dt7xx_port_trace.c54 struct dentry *debugfs_dir = port->t7xx_dev->debugfs_dir;
103 port->t7xx_dev->debugfs_dir = debugfs_dir;
H A Dt7xx_hif_dpmaif.h164 void (*state_notify)(struct t7xx_pci_dev *t7xx_dev,
172 struct t7xx_pci_dev *t7xx_dev; member in struct:dpmaif_ctrl
194 struct dpmaif_ctrl *t7xx_dpmaif_hif_init(struct t7xx_pci_dev *t7xx_dev,
H A Dt7xx_hif_cldma.h100 struct t7xx_pci_dev *t7xx_dev; member in struct:cldma_ctrl
121 int t7xx_cldma_alloc(enum cldma_id hif_id, struct t7xx_pci_dev *t7xx_dev);
H A Dt7xx_hif_cldma.c540 t7xx_pcie_mac_set_int(md_ctrl->t7xx_dev, md_ctrl->hw_info.phy_interrupt_id);
545 t7xx_pcie_mac_clear_int(md_ctrl->t7xx_dev, md_ctrl->hw_info.phy_interrupt_id);
935 t7xx_pci_disable_sleep(md_ctrl->t7xx_dev);
957 if (!t7xx_pci_sleep_disable_complete(md_ctrl->t7xx_dev)) {
974 if (!t7xx_pci_sleep_disable_complete(md_ctrl->t7xx_dev)) {
989 t7xx_pci_enable_sleep(md_ctrl->t7xx_dev);
1079 struct t7xx_addr_base *pbase = &md_ctrl->t7xx_dev->base_addr;
1107 int t7xx_cldma_alloc(enum cldma_id hif_id, struct t7xx_pci_dev *t7xx_dev) argument
1109 struct device *dev = &t7xx_dev->pdev->dev;
1117 md_ctrl->t7xx_dev
1128 t7xx_cldma_resume_early(struct t7xx_pci_dev *t7xx_dev, void *entity_param) argument
1153 t7xx_cldma_resume(struct t7xx_pci_dev *t7xx_dev, void *entity_param) argument
1170 t7xx_cldma_suspend_late(struct t7xx_pci_dev *t7xx_dev, void *entity_param) argument
1188 t7xx_cldma_suspend(struct t7xx_pci_dev *t7xx_dev, void *entity_param) argument
[all...]
H A Dt7xx_hif_dpmaif_tx.c125 cb->state_notify(dpmaif_ctrl->t7xx_dev, DMPAIF_TXQ_STATE_IRQ, txq->index);
170 t7xx_pci_disable_sleep(dpmaif_ctrl->t7xx_dev);
171 if (t7xx_pci_sleep_disable_complete(dpmaif_ctrl->t7xx_dev)) {
187 t7xx_pci_enable_sleep(dpmaif_ctrl->t7xx_dev);
312 cb->state_notify(dpmaif_ctrl->t7xx_dev, DMPAIF_TXQ_STATE_FULL, txq->index);
432 if (!t7xx_pci_sleep_disable_complete(dpmaif_ctrl->t7xx_dev))
468 t7xx_pci_disable_sleep(dpmaif_ctrl->t7xx_dev);
470 t7xx_pci_enable_sleep(dpmaif_ctrl->t7xx_dev);
515 cb->state_notify(dpmaif_ctrl->t7xx_dev, DMPAIF_TXQ_STATE_FULL, txq_number);
H A Dt7xx_port_ctrl_msg.c60 struct device *dev = &ctl->md->t7xx_dev->pdev->dev;
129 struct device *dev = &md->t7xx_dev->pdev->dev;
161 struct t7xx_fsm_ctl *ctl = port->t7xx_dev->md->fsm_ctl;
H A Dt7xx_hif_dpmaif_rx.c714 dpmaif_ctrl->callbacks->recv_skb(dpmaif_ctrl->t7xx_dev->ccmni_ctlb, skb, &rxq->napi);
834 struct t7xx_pci_dev *t7xx_dev = rxq->dpmaif_ctrl->t7xx_dev; local
849 t7xx_pci_disable_sleep(t7xx_dev);
851 ret = try_wait_for_completion(&t7xx_dev->sleep_lock_acquire);
878 t7xx_pci_enable_sleep(rxq->dpmaif_ctrl->t7xx_dev);
1070 t7xx_pci_disable_sleep(dpmaif_ctrl->t7xx_dev);
1074 if (t7xx_pci_sleep_disable_complete(dpmaif_ctrl->t7xx_dev)) {
1079 t7xx_pci_enable_sleep(dpmaif_ctrl->t7xx_dev);
H A Dt7xx_port.h108 struct t7xx_pci_dev *t7xx_dev; member in struct:t7xx_port
H A Dt7xx_port_wwan.c99 ctl = port->t7xx_dev->md->fsm_ctl;

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