/u-boot/drivers/clk/meson/ |
H A D | clk_meson.h | 29 u8 shift; member in struct:parm 34 #define SETPMASK(width, shift) GENMASK(shift + width - 1, shift) 35 #define CLRPMASK(width, shift) (~SETPMASK(width, shift)) 37 #define PARM_GET(width, shift, reg) \ 38 (((reg) & SETPMASK(width, shift)) >> (shift)) 39 #define PARM_SET(width, shift, re [all...] |
/u-boot/arch/arm/mach-uniphier/bcu/ |
H A D | bcu-ld4.c | 17 int shift; local 26 shift = bd->dram_ch[0].size / 0x04000000 * 4; 27 writel(ch(shift), BCIPPCCHR2); /* 0x80000000-0x9fffffff */ 29 shift -= 32; 30 writel(ch(shift), BCIPPCCHR3); /* 0xa0000000-0xbfffffff */ 32 shift -= 32; 33 writel(ch(shift), BCIPPCCHR4); /* 0xc0000000-0xdfffffff */
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/u-boot/include/ |
H A D | bitfield.h | 43 static inline uint bitfield_mask(uint shift, uint width) argument 45 return ((1 << width) - 1) << shift; 49 static inline uint bitfield_extract(uint reg_val, uint shift, uint width) argument 51 return (reg_val & bitfield_mask(shift, width)) >> shift; 58 static inline uint bitfield_replace(uint reg_val, uint shift, uint width, argument 61 uint mask = bitfield_mask(shift, width); 63 return (reg_val & ~mask) | ((bitfield_val << shift) & mask); 66 /* Produces a shift of the bitfield given a mask */ 75 uint shift local 87 uint shift = bitfield_shift(mask); local [all...] |
H A D | sandbox-clk.h | 46 void __iomem *reg, u8 shift, 50 reg, shift, width, 0); 69 void __iomem *reg, u8 shift) 72 CLK_SET_RATE_PARENT, reg, shift, 77 u8 shift, u8 width, 82 CLK_SET_RATE_NO_REPARENT, reg, shift, 44 sandbox_clk_divider(const char *name, const char *parent, void __iomem *reg, u8 shift, u8 width) argument 67 sandbox_clk_gate2(const char *name, const char *parent, void __iomem *reg, u8 shift) argument 76 sandbox_clk_mux(const char *name, void __iomem *reg, u8 shift, u8 width, const char * const *parents, int num_parents) argument
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/u-boot/arch/x86/lib/ |
H A D | div64.c | 19 u64 __ashldi3(u64 num, unsigned int shift) argument 24 if (shift >= 32) { 25 output.words.higher = output.words.lower << (shift - 32); 28 if (!shift) 30 output.words.higher = (output.words.higher << shift) | 31 (output.words.lower >> (32 - shift)); 32 output.words.lower = output.words.lower << shift; 37 u64 __lshrdi3(u64 num, unsigned int shift) argument 42 if (shift >= 32) { 43 output.words.lower = output.words.higher >> (shift [all...] |
/u-boot/drivers/mfd/ |
H A D | atmel-smc.c | 86 * @shift: the position of the Txx field in the TIMINGS register 92 * @conf->timings field at @shift position. 94 * Returns -EINVAL if shift is invalid, -ERANGE if ncycles does not fit in 98 unsigned int shift, unsigned int ncycles) 103 if (shift != ATMEL_HSMC_TIMINGS_TCLR_SHIFT && 104 shift != ATMEL_HSMC_TIMINGS_TADL_SHIFT && 105 shift != ATMEL_HSMC_TIMINGS_TAR_SHIFT && 106 shift != ATMEL_HSMC_TIMINGS_TRR_SHIFT && 107 shift != ATMEL_HSMC_TIMINGS_TWB_SHIFT) 117 conf->timings &= ~GENMASK(shift 97 atmel_smc_cs_conf_set_timing(struct atmel_smc_cs_conf *conf, unsigned int shift, unsigned int ncycles) argument 139 atmel_smc_cs_conf_set_setup(struct atmel_smc_cs_conf *conf, unsigned int shift, unsigned int ncycles) argument 178 atmel_smc_cs_conf_set_pulse(struct atmel_smc_cs_conf *conf, unsigned int shift, unsigned int ncycles) argument 217 atmel_smc_cs_conf_set_cycle(struct atmel_smc_cs_conf *conf, unsigned int shift, unsigned int ncycles) argument [all...] |
/u-boot/drivers/clk/imx/ |
H A D | clk.h | 91 void __iomem *reg, u8 shift) 94 shift, 0x3, 0, NULL); 99 void __iomem *reg, u8 shift, 103 shift, 0x3, 0, share_count); 108 void __iomem *reg, u8 shift, 112 CLK_OPS_PARENT_ENABLE, reg, shift, 0x3, 0, 117 void __iomem *reg, u8 shift) 121 reg, shift, 0x3, 0, NULL); 125 const char *parent, void __iomem *reg, u8 shift, 130 reg, shift, 90 imx_clk_gate2(const char *name, const char *parent, void __iomem *reg, u8 shift) argument 97 imx_clk_gate2_shared(const char *name, const char *parent, void __iomem *reg, u8 shift, unsigned int *share_count) argument 106 imx_clk_gate2_shared2(const char *name, const char *parent, void __iomem *reg, u8 shift, unsigned int *share_count) argument 116 imx_clk_gate4(const char *name, const char *parent, void __iomem *reg, u8 shift) argument 124 imx_clk_gate4_flags(const char *name, const char *parent, void __iomem *reg, u8 shift, unsigned long flags) argument 140 imx_clk_divider(const char *name, const char *parent, void __iomem *reg, u8 shift, u8 width) argument 148 imx_clk_busy_divider(const char *name, const char *parent, void __iomem *reg, u8 shift, u8 width, void __iomem *busy_reg, u8 busy_shift) argument 155 imx_clk_divider2(const char *name, const char *parent, void __iomem *reg, u8 shift, u8 width) argument 170 imx_clk_mux_flags(const char *name, void __iomem *reg, u8 shift, u8 width, const char * const *parents, int num_parents, unsigned long flags) argument 180 imx_clk_mux2_flags(const char *name, void __iomem *reg, u8 shift, u8 width, const char * const *parents, int num_parents, unsigned long flags) argument 190 imx_clk_mux(const char *name, void __iomem *reg, u8 shift, u8 width, const char * const *parents, int num_parents) argument 200 imx_clk_busy_mux(const char *name, void __iomem *reg, u8 shift, u8 width, void __iomem *busy_reg, u8 busy_shift, const char * const *parents, int num_parents) argument 209 imx_clk_mux2(const char *name, void __iomem *reg, u8 shift, u8 width, const char * const *parents, int num_parents) argument 218 imx_clk_gate(const char *name, const char *parent, void __iomem *reg, u8 shift) argument 225 imx_clk_gate_flags(const char *name, const char *parent, void __iomem *reg, u8 shift, unsigned long flags) argument 232 imx_clk_gate3(const char *name, const char *parent, void __iomem *reg, u8 shift) argument [all...] |
/u-boot/drivers/misc/ |
H A D | pca9551_led.c | 43 u8 shift, buf; local 50 shift = led << 1; 53 shift = (led - 4) << 1; 60 *state = (buf >> shift) & 0x03; 67 u8 shift, buf, mask; local 74 shift = led << 1; 77 shift = (led - 4) << 1; 79 mask = 0x03 << shift; 85 buf = (buf & ~mask) | ((state & 0x03) << shift);
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/u-boot/arch/arm/mach-kirkwood/ |
H A D | mpp.c | 57 int shift; local 70 shift = (num & 7) << 2; 73 sel_save = (mpp_ctrl[num / 8] >> shift) & 0xf; 78 mpp_ctrl[num / 8] &= ~(0xf << shift); 79 mpp_ctrl[num / 8] |= sel << shift;
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/u-boot/drivers/pinctrl/nxp/ |
H A D | pinctrl-mxs.h | 56 static inline void mxs_pinctrl_rmwl(u32 value, u32 mask, u8 shift, argument 59 clrsetbits_le32(reg, mask << shift, value << shift);
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H A D | pinctrl-mxs.c | 50 int muxsel = MUXID_TO_MUXSEL(val), shift; local 55 shift = pin % 16 * 2; 57 mxs_pinctrl_rmwl(muxsel, 0x3, shift, reg); 102 int pinid, bank, pin, shift; local 123 shift = pin % 8 * 4; 124 mxs_pinctrl_rmwl(ma, 0x3, shift, reg); 129 shift = pin % 8 * 4 + 2; 131 writel(1 << shift, reg + SET); 133 writel(1 << shift, reg + CLR); 140 shift [all...] |
/u-boot/drivers/clk/ti/ |
H A D | clk.h | 21 void clk_ti_latch(struct clk_ti_reg *reg, s8 shift);
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/u-boot/drivers/pinctrl/mtmips/ |
H A D | pinctrl-mtmips-common.h | 20 u32 shift; member in struct:mtmips_pmx_group 44 { .name = (_name), .reg = (_reg), .shift = (_shift), .mask = (_mask), \ 48 { .name = (_name), .reg = (_reg), .shift = (_shift), .mask = (_mask), \ 53 u32 reg, u32 shift, u32 mask, u32 value);
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H A D | pinctrl-mtmips-common.c | 17 u32 reg, u32 shift, u32 mask, u32 value) 22 val &= ~(mask << shift); 23 val |= value << shift; 54 mtmips_pinctrl_reg_set(priv, grp->reg, grp->shift, 16 mtmips_pinctrl_reg_set(struct mtmips_pinctrl_priv *priv, u32 reg, u32 shift, u32 mask, u32 value) argument
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/u-boot/arch/mips/mach-mtmips/ |
H A D | ddr_cal.c | 75 int maxval, int shift, u32 regval) 81 dqsval = regval | (fieldval << shift); 90 int minval, int shift, u32 regval) 96 dqsval = regval | (fieldval << shift); 110 u32 dqs_dly_tmp, dqs_dly, test_dqs, shift; local 145 shift = i * 8; 146 dqs_dly &= ~(0xff << shift); 149 dqs_dly_tmp = dqs_dly | (0xf << shift); 151 0xf, 4 + shift, dqs_dly_tmp); 154 dqs_dly_tmp = dqs_dly | (dqs_coarse_max << (4 + shift)); 74 dqs_find_max(void __iomem *memc, u32 memsize, int initval, int maxval, int shift, u32 regval) argument 89 dqs_find_min(void __iomem *memc, u32 memsize, int initval, int minval, int shift, u32 regval) argument [all...] |
/u-boot/drivers/gpio/ |
H A D | hsdk-creg-gpio.c | 25 u8 shift; member in struct:hsdk_creg_gpio 34 u8 reg_shift = oft * hcg->bit_per_gpio + hcg->shift; 67 val >>= oft * hcg->bit_per_gpio + hcg->shift; 83 u32 shift, bit_per_gpio, activate, deactivate, gpio_count; local 88 shift = dev_read_u32_default(dev, "gpio-first-shift", 0); 112 if ((gpio_count * bit_per_gpio + shift) > 32) { 114 uc_priv->bank_name, gpio_count * bit_per_gpio + shift); 140 hcg->shift = (u8)shift; [all...] |
/u-boot/include/linux/ |
H A D | math64.h | 153 static inline u64 mul_u64_u32_shr(u64 a, u32 mul, unsigned int shift) argument 155 return (u64)(((unsigned __int128)a * mul) >> shift); 160 static inline u64 mul_u64_u64_shr(u64 a, u64 mul, unsigned int shift) argument 162 return (u64)(((unsigned __int128)a * mul) >> shift); 169 static inline u64 mul_u64_u32_shr(u64 a, u32 mul, unsigned int shift) argument 177 ret = mul_u32_u32(al, mul) >> shift; 179 ret += mul_u32_u32(ah, mul) << (32 - shift); 186 static inline u64 mul_u64_u64_shr(u64 a, u64 b, unsigned int shift) argument 219 * shift it right and throw away the high part of the result. 221 if (shift [all...] |
/u-boot/drivers/i2c/ |
H A D | soft_i2c.c | 323 int shift; local 358 shift = (alen-1) * 8; 360 if(write_byte(addr >> shift)) { 364 shift -= 8; 398 int shift, failures = 0; local 409 shift = (alen-1) * 8; 411 if(write_byte(addr >> shift)) { 415 shift -= 8;
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/u-boot/arch/arm/mach-zynqmp/include/mach/ |
H A D | psu_init_gpl.h | 20 unsigned long shift, unsigned long value);
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/u-boot/arch/arm/mach-uniphier/debug-uart/ |
H A D | debug-uart.c | 33 unsigned int shift = pin * mux_bits % 32; local 40 tmp &= ~(mask << shift); 41 tmp |= (mask & muxval) << shift;
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/u-boot/drivers/clk/ |
H A D | clk-mux.c | 99 val >>= mux->shift; 139 reg = mux->mask << (mux->shift + 16); 146 reg &= ~(mux->mask << mux->shift); 148 val = val << mux->shift; 167 void __iomem *reg, u8 shift, u32 mask, 177 if (width + shift > 16) { 194 mux->shift = shift; 224 void __iomem *reg, u8 shift, u32 mask, 230 flags, reg, shift, mas 164 clk_hw_register_mux_table(struct device *dev, const char *name, const char * const *parent_names, u8 num_parents, unsigned long flags, void __iomem *reg, u8 shift, u32 mask, u8 clk_mux_flags, u32 *table) argument 221 clk_register_mux_table(struct device *dev, const char *name, const char * const *parent_names, u8 num_parents, unsigned long flags, void __iomem *reg, u8 shift, u32 mask, u8 clk_mux_flags, u32 *table) argument 237 clk_register_mux(struct device *dev, const char *name, const char * const *parent_names, u8 num_parents, unsigned long flags, void __iomem *reg, u8 shift, u8 width, u8 clk_mux_flags) argument [all...] |
H A D | clk-divider.c | 90 val >>= divider->shift; 171 val = clk_div_mask(divider->width) << (divider->shift + 16); 174 val &= ~(clk_div_mask(divider->width) << divider->shift); 176 val |= (u32)value << divider->shift; 189 void __iomem *reg, u8 shift, u8 width, 197 if (width + shift > 16) { 210 div->shift = shift; 233 void __iomem *reg, u8 shift, u8 width, 238 clk = _register_divider(dev, name, parent_name, flags, reg, shift, 187 _register_divider(struct device *dev, const char *name, const char *parent_name, unsigned long flags, void __iomem *reg, u8 shift, u8 width, u8 clk_divider_flags, const struct clk_div_table *table) argument 231 clk_register_divider(struct device *dev, const char *name, const char *parent_name, unsigned long flags, void __iomem *reg, u8 shift, u8 width, u8 clk_divider_flags) argument [all...] |
/u-boot/drivers/clk/at91/ |
H A D | clk-peripheral.c | 159 u32 val, shift = ffs(periph->layout->div_mask) - 1; local 167 shift = (val & periph->layout->div_mask) >> shift; 169 return parent_rate >> shift; 176 int shift; local 191 for (shift = 0; shift <= PERIPHERAL_MAX_SHIFT; shift++) { 192 if (parent_rate >> shift <= rate) 195 if (shift [all...] |
/u-boot/arch/arm/mach-imx/mx7ulp/ |
H A D | scg.c | 57 u32 shift, mask; local 62 shift = SCG_SIRCDIV_DIV1_SHIFT; 66 shift = SCG_SIRCDIV_DIV2_SHIFT; 70 shift = SCG_SIRCDIV_DIV3_SHIFT; 81 val = (reg & mask) >> shift; 95 u32 shift, mask; local 100 shift = SCG_FIRCDIV_DIV1_SHIFT; 104 shift = SCG_FIRCDIV_DIV2_SHIFT; 108 shift = SCG_FIRCDIV_DIV3_SHIFT; 119 val = (reg & mask) >> shift; 133 u32 shift, mask; local 171 u32 shift, mask, gate, valid; local 221 u32 shift, mask, gate, valid; local 358 u32 shift, mask; local 634 u32 shift, mask, gate, valid; local [all...] |
/u-boot/drivers/net/qe/ |
H A D | uccf.c | 46 u8 *reg_num, u8 *shift) 52 *shift = 16; 57 *shift = 0; 62 *shift = 16; 67 *shift = 0; 72 *shift = 16; 77 *shift = 0; 82 *shift = 16; 87 *shift = 0; 98 u8 shift local 45 ucc_get_cmxucr_reg(int ucc_num, u32 **p_cmxucr, u8 *reg_num, u8 *shift) argument 285 clk_bits <<= shift; local 286 clk_mask <<= shift; local [all...] |