Searched refs:scl (Results 1 - 25 of 37) sorted by relevance

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/linux-master/drivers/gpu/drm/loongson/
H A Dlsdc_i2c.h20 u8 scl; member in struct:lsdc_i2c
H A Dlsdc_i2c.c83 /* set state on the li2c->scl pin */
84 return __lsdc_gpio_i2c_set(li2c, li2c->scl, state);
97 /* read the value from the li2c->scl pin */
98 return __lsdc_gpio_i2c_get(li2c, li2c->scl);
134 li2c->scl = 0x02; /* pin 1 */
137 li2c->scl = 0x08; /* pin 3 */
174 drm_info(ddev, "%s(sda pin mask=%u, scl pin mask=%u) created\n",
175 adapter->name, li2c->sda, li2c->scl);
/linux-master/drivers/i2c/busses/
H A Di2c-gpio.c23 struct gpio_desc *scl; member in struct:i2c_gpio_private_data
56 gpiod_set_value_cansleep(priv->scl, state);
70 return gpiod_get_value_cansleep(priv->scl);
101 WIRE_ATTRIBUTE(scl); variable
168 int ret, irq = gpiod_to_irq(priv->scl);
175 ret = gpiod_direction_input(priv->scl);
190 ret = gpiod_direction_output(priv->scl, 1) ?: ret;
271 debugfs_create_file_unsafe("scl", 0600, priv->adap.debugfs, priv, &fops_scl);
292 device_property_read_bool(dev, "i2c-gpio,scl-open-drain");
294 device_property_read_bool(dev, "i2c-gpio,scl
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H A Di2c-hix5hd2.c123 u32 scl, sysclock; local
131 scl = (sysclock / (rate * 2)) / 2 - 1;
132 writel_relaxed(scl, priv->regs + HIX5I2C_SCL_H);
133 writel_relaxed(scl, priv->regs + HIX5I2C_SCL_L);
138 dev_dbg(priv->dev, "%s: sysclock=%d, rate=%d, scl=%d\n",
139 __func__, sysclock, rate, scl);
H A Di2c-omap.c429 unsigned long scl; local
432 scl = internal_clk / 400;
433 fsscll = scl - (scl / 3) - 7;
434 fssclh = (scl / 3) - 5;
437 scl = fclk_rate / omap->speed;
438 hsscll = scl - (scl / 3) - 7;
439 hssclh = (scl / 3) - 5;
441 unsigned long scl; local
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H A Di2c-rcar.c278 u32 cdf, round, ick, sum, scl, cdf_width; local
345 scl = ick / (20 + 8 * scgd + round);
351 scl, t.bus_freq_hz, rate, round, cdf, scgd);
373 scl = rate / (8 + 2 * priv->smd + sum_ratio * x + round);
385 scl, t.bus_freq_hz, rate, round, cdf, priv->schd, priv->scld, priv->smd);
/linux-master/drivers/gpu/drm/amd/display/dc/hwss/dce/
H A Ddce_hwseq.c52 uint32_t dcp_grph, scl, blnd, update_lock_mode, val; local
62 BLND_SCL_V_UPDATE_LOCK, &scl,
67 scl = lock_val;
73 BLND_SCL_V_UPDATE_LOCK, scl);
/linux-master/drivers/gpu/drm/imx/dcss/
H A Ddcss-scaler.c71 struct dcss_scaler *scl; member in struct:dcss_scaler_ch
289 struct dcss_scaler *scl = ch->scl; local
291 dcss_ctxld_write(scl->ctxld, scl->ctx_id, val, ch->base_ofs + ofs);
294 static int dcss_scaler_ch_init_all(struct dcss_scaler *scl, argument
301 ch = &scl->ch[i];
305 ch->base_reg = devm_ioremap(scl->dev, ch->base_ofs, SZ_4K);
307 dev_err(scl->dev, "scaler: unable to remap ch base\n");
311 ch->scl
336 dcss_scaler_exit(struct dcss_scaler *scl) argument
347 dcss_scaler_ch_enable(struct dcss_scaler *scl, int ch_num, bool en) argument
561 dcss_scaler_get_min_max_ratios(struct dcss_scaler *scl, int ch_num, int *min, int *max) argument
760 dcss_scaler_set_filter(struct dcss_scaler *scl, int ch_num, enum drm_scaling_filter scaling_filter) argument
768 dcss_scaler_setup(struct dcss_scaler *scl, int ch_num, const struct drm_format_info *format, int src_xres, int src_yres, int dst_xres, int dst_yres, u32 vrefresh_hz) argument
823 dcss_scaler_write_sclctrl(struct dcss_scaler *scl) argument
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H A Ddcss-dev.h166 void dcss_scaler_exit(struct dcss_scaler *scl);
167 void dcss_scaler_set_filter(struct dcss_scaler *scl, int ch_num,
169 void dcss_scaler_setup(struct dcss_scaler *scl, int ch_num,
173 void dcss_scaler_ch_enable(struct dcss_scaler *scl, int ch_num, bool en);
174 int dcss_scaler_get_min_max_ratios(struct dcss_scaler *scl, int ch_num,
176 void dcss_scaler_write_sclctrl(struct dcss_scaler *scl);
/linux-master/drivers/firmware/
H A Dstratix10-svc.c158 * @scl: pointer to service client which owns the channel
167 struct stratix10_svc_client *scl; member in struct:stratix10_svc_chan
230 p_data->chan->scl->receive_cb(p_data->chan->scl,
305 p_data->chan->scl->receive_cb(p_data->chan->scl, cb_data);
378 p_data->chan->scl->receive_cb(p_data->chan->scl, cb_data);
583 pdata->chan->scl->receive_cb(pdata->chan->scl, cbdat
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/linux-master/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
H A Dvega10_processpptables.c375 static void get_scl_sda_value(uint8_t line, uint8_t *scl, uint8_t *sda) argument
379 *scl = Vega10_I2C_DDC1CLK;
383 *scl = Vega10_I2C_DDC2CLK;
387 *scl = Vega10_I2C_DDC3CLK;
391 *scl = Vega10_I2C_DDC4CLK;
395 *scl = Vega10_I2C_DDC5CLK;
399 *scl = Vega10_I2C_DDC6CLK;
403 *scl = Vega10_I2C_SCL;
407 *scl = Vega10_I2C_DDCVGACLK;
411 *scl
424 uint8_t scl; local
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/linux-master/drivers/staging/olpc_dcon/
H A Dolpc_dcon_xo_1_5.c130 static void set_i2c_line(int sda, int scl) argument
139 if (scl)
/linux-master/drivers/i2c/algos/
H A Di2c-algo-bit.c72 * Raise scl line, and do checking for delays. This is necessary for slower
81 /* Not all adapters have scl sense line... */
117 /* assert: scl, sda are high */
125 /* assert: scl is low */
136 /* assert: scl is low */
150 * -ETIMEDOUT if an error occurred (while raising the scl line)
159 /* assert: scl is low */
195 /* assert: scl is low (sda undef) */
207 /* assert: scl is low */
222 /* assert: scl i
234 int scl, sda, ret; local
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/linux-master/drivers/gpu/drm/amd/display/dc/dml/dcn20/
H A Ddcn20_fpu.c1569 pipes[pipe_cnt].pipe.scale_ratio_depth.scl_enable = 0; /*Lb only or Full scl*/
1584 struct scaler_data *scl = &res_ctx->pipe_ctx[i].plane_res.scl_data; local
1617 pipes[pipe_cnt].pipe.src.viewport_y_y = scl->viewport.y;
1618 pipes[pipe_cnt].pipe.src.viewport_y_c = scl->viewport_c.y;
1619 pipes[pipe_cnt].pipe.src.viewport_x_y = scl->viewport.x;
1620 pipes[pipe_cnt].pipe.src.viewport_x_c = scl->viewport_c.x;
1621 pipes[pipe_cnt].pipe.src.viewport_width = scl->viewport.width;
1622 pipes[pipe_cnt].pipe.src.viewport_width_c = scl->viewport_c.width;
1623 pipes[pipe_cnt].pipe.src.viewport_height = scl->viewport.height;
1624 pipes[pipe_cnt].pipe.src.viewport_height_c = scl
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H A Ddisplay_rq_dlg_calc_20v2.c799 const scaler_ratio_depth_st *scl = &e2e_pipe_param[pipe_idx].pipe.scale_ratio_depth; local
987 hratio_l = scl->hscl_ratio;
988 hratio_c = scl->hscl_ratio_c;
989 vratio_l = scl->vscl_ratio;
990 vratio_c = scl->vscl_ratio_c;
991 scl_enable = scl->scl_enable;
994 // vinit_l = scl.vinit;
995 // vinit_c = scl.vinit_c;
996 // vinit_bot_l = scl.vinit_bot;
997 // vinit_bot_c = scl
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H A Ddisplay_rq_dlg_calc_20.c799 const scaler_ratio_depth_st *scl = &e2e_pipe_param[pipe_idx].pipe.scale_ratio_depth; local
986 hratio_l = scl->hscl_ratio;
987 hratio_c = scl->hscl_ratio_c;
988 vratio_l = scl->vscl_ratio;
989 vratio_c = scl->vscl_ratio_c;
990 scl_enable = scl->scl_enable;
993 // vinit_l = scl.vinit;
994 // vinit_c = scl.vinit_c;
995 // vinit_bot_l = scl.vinit_bot;
996 // vinit_bot_c = scl
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/linux-master/drivers/scsi/
H A Dmac53c94.c361 struct scatterlist *scl; local
376 scsi_for_each_sg(cmd, scl, nseg, i) {
377 dma_addr = sg_dma_address(scl);
378 dma_len = sg_dma_len(scl);
/linux-master/drivers/gpu/drm/amd/display/dc/dml/dcn21/
H A Ddisplay_rq_dlg_calc_21.c845 const scaler_ratio_depth_st *scl = &e2e_pipe_param[pipe_idx].pipe.scale_ratio_depth; local
1038 hratio_l = scl->hscl_ratio;
1039 hratio_c = scl->hscl_ratio_c;
1040 vratio_l = scl->vscl_ratio;
1041 vratio_c = scl->vscl_ratio_c;
1042 scl_enable = scl->scl_enable;
1439 scl->hscl_ratio,
1456 scl->hscl_ratio,
/linux-master/drivers/i2c/
H A Di2c-core-base.c226 int i = 0, scl = 1, ret = 0; local
240 bri->set_scl(adap, scl);
243 bri->set_sda(adap, scl);
250 if (scl) {
260 scl = !scl;
261 bri->set_scl(adap, scl);
263 if (scl) {
271 bri->set_sda(adap, scl);
274 if (scl) {
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/linux-master/drivers/gpu/drm/rockchip/
H A Drockchip_vop_reg.c116 .scl = &rk3036_win0_scl,
136 .scl = &rk3036_win1_scl,
304 .scl = &px30_win_scl,
404 .scl = &rk3066_win_scl,
528 .scl = &rk3188_win_scl,
660 .scl = &rk3288_win_full_scl,
802 .scl = &rk3288_win_full_scl,
972 .scl = &rk3288_win_full_scl,
996 .scl = &rk3288_win_full_scl,
H A Drockchip_drm_vop.c47 vop_reg_set(vop, &win->phy->scl->name, win->base, ~0, v, #name)
49 vop_reg_set(vop, &win->phy->scl->ext->name, \
404 if (!win->phy->scl->ext) {
608 if (win->phy->scl && win->phy->scl->ext) {
822 int min_scale = win->phy->scl ? FRAC_16_16(1, 8) :
824 int max_scale = win->phy->scl ? FRAC_16_16(8, 1) :
1032 if (win->phy->scl)
1081 int min_scale = win->phy->scl ? FRAC_16_16(1, 8) :
1083 int max_scale = win->phy->scl
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/linux-master/drivers/gpu/drm/amd/display/dc/dml/dcn30/
H A Ddisplay_rq_dlg_calc_30.c908 const scaler_ratio_depth_st *scl = &e2e_pipe_param[pipe_idx].pipe.scale_ratio_depth; local
1096 hratio_l = scl->hscl_ratio;
1097 hratio_c = scl->hscl_ratio_c;
1098 vratio_l = scl->vscl_ratio;
1099 vratio_c = scl->vscl_ratio_c;
1100 scl_enable = scl->scl_enable;
1538 scl->hscl_ratio,
1554 scl->hscl_ratio,
/linux-master/drivers/gpu/drm/amd/pm/powerplay/smumgr/
H A Dfiji_smumgr.c425 static void get_scl_sda_value(uint8_t line, uint8_t *scl, uint8_t *sda) argument
429 *scl = SMU7_I2C_DDC1CLK;
433 *scl = SMU7_I2C_DDC2CLK;
437 *scl = SMU7_I2C_DDC3CLK;
441 *scl = SMU7_I2C_DDC4CLK;
445 *scl = SMU7_I2C_DDC5CLK;
449 *scl = SMU7_I2C_DDC6CLK;
453 *scl = SMU7_I2C_SCL;
457 *scl = SMU7_I2C_DDCVGACLK;
461 *scl
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/linux-master/drivers/gpu/drm/amd/display/dc/dml/dcn31/
H A Ddisplay_rq_dlg_calc_31.c870 const scaler_ratio_depth_st *scl = &e2e_pipe_param[pipe_idx].pipe.scale_ratio_depth; local
1017 hratio_l = scl->hscl_ratio;
1018 hratio_c = scl->hscl_ratio_c;
1019 vratio_l = scl->vscl_ratio;
1020 vratio_c = scl->vscl_ratio_c;
1392 scl->hscl_ratio,
/linux-master/drivers/gpu/drm/amd/display/dc/dml/dcn314/
H A Ddisplay_rq_dlg_calc_314.c955 const scaler_ratio_depth_st *scl = &e2e_pipe_param[pipe_idx].pipe.scale_ratio_depth; local
1104 hratio_l = scl->hscl_ratio;
1105 hratio_c = scl->hscl_ratio_c;
1106 vratio_l = scl->vscl_ratio;
1107 vratio_c = scl->vscl_ratio_c;
1480 scl->hscl_ratio,

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