/asus-wl-520gu-7.0.1.45/src/include/ |
H A D | sbutils.h | 50 * Many of the routines below take an 'sbh' handle as their first arg. 52 * At any one time, the sbh is logically focused on one particular sb core 63 extern void sb_detach(sb_t *sbh); 64 extern uint sb_chip(sb_t *sbh); 65 extern uint sb_chiprev(sb_t *sbh); 66 extern uint sb_chipcrev(sb_t *sbh); 67 extern uint sb_chippkg(sb_t *sbh); 68 extern uint sb_pcirev(sb_t *sbh); 69 extern bool sb_war16165(sb_t *sbh); 70 extern uint sb_pcmciarev(sb_t *sbh); [all...] |
H A D | hndcpu.h | 24 extern uint sb_irq(sb_t *sbh); 25 extern uint32 sb_cpu_clock(sb_t *sbh); 26 extern void hnd_cpu_wait(sb_t *sbh); 28 extern void hnd_cpu_reset(sb_t *sbh);
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H A D | hndgige.h | 18 extern void sb_gige_init(sb_t *sbh, uint32 unit, bool *rgmii);
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H A D | hndpci.h | 17 extern int sbpci_read_config(sb_t *sbh, uint bus, uint dev, uint func, uint off, void *buf, 19 extern int extpci_read_config(sb_t *sbh, uint bus, uint dev, uint func, uint off, void *buf, 21 extern int sbpci_write_config(sb_t *sbh, uint bus, uint dev, uint func, uint off, void *buf, 23 extern int extpci_write_config(sb_t *sbh, uint bus, uint dev, uint func, uint off, void *buf, 26 extern int sbpci_init(sb_t *sbh); 27 extern int sbpci_init_pci(sb_t *sbh); 28 extern void sbpci_init_cores(sb_t *sbh); 29 extern void sbpci_arb_park(sb_t *sbh, uint parkid);
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H A D | hndpmu.h | 23 extern void sb_pmu_init(sb_t *sbh, osl_t *osh); 24 extern void sb_pmu_pll_init(sb_t *sbh, osl_t *osh, uint32 xtalfreq); 25 extern void sb_pmu_res_init(sb_t *sbh, osl_t *osh); 26 extern uint32 sb_pmu_force_ilp(sb_t *sbh, osl_t *osh, bool force); 27 extern uint32 sb_pmu_cpu_clock(sb_t *sbh, osl_t *osh); 28 extern uint32 sb_pmu_alp_clock(sb_t *sbh, osl_t *osh); 30 extern void sb_pmu_set_switcher_voltage(sb_t *sbh, osl_t *osh, uint8 bb_voltage, uint8 rf_voltage); 31 extern void sb_pmu_set_ldo_voltage(sb_t *sbh, osl_t *osh, uint8 ldo, uint8 voltage); 32 extern void sb_pmu_paref_ldo_enable(sb_t *sbh, osl_t *osh, bool enable); 33 extern uint16 sb_pmu_fast_pwrup_delay(sb_t *sbh, osl_ [all...] |
H A D | sflash.h | 29 extern int sflash_poll(sb_t *sbh, chipcregs_t *cc, uint offset); 30 extern int sflash_read(sb_t *sbh, chipcregs_t *cc, 32 extern int sflash_write(sb_t *sbh, chipcregs_t *cc, 34 extern int sflash_erase(sb_t *sbh, chipcregs_t *cc, uint offset); 35 extern int sflash_commit(sb_t *sbh, chipcregs_t *cc, 37 extern struct sflash *sflash_init(sb_t *sbh, chipcregs_t *cc);
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H A D | hndchipc.h | 20 extern void sb_serial_init(sb_t *sbh, sb_serial_init_fn add); 22 extern void *sb_jtagm_init(sb_t *sbh, uint clkd, bool exttap); 28 extern bool sb_cc_register_isr(sb_t *sbh, cc_isr_fn isr, uint32 ccintmask, void *cbdata); 29 extern void sb_cc_isr(sb_t *sbh, chipcregs_t *regs);
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H A D | hndmips.h | 18 extern void sb_mips_init(sb_t *sbh, uint shirq_map_base); 19 extern bool sb_mips_setclock(sb_t *sbh, uint32 mipsclock, uint32 sbclock, uint32 pciclock); 21 extern uint32 sb_memc_get_ncdl(sb_t *sbh);
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H A D | bcmnvram.h | 50 extern int nvram_init(void *sbh); 60 extern bool nvram_reset(void *sbh); 66 extern void nvram_exit(void *sbh); 80 extern int BCMINITFN(nvram_resetgpio_init)(void *sbh);
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/asus-wl-520gu-7.0.1.45/src/cfe/cfe/arch/mips/board/bcm947xx/include/ |
H A D | bsp_priv.h | 6 #define sbh bcm947xx_sbh macro
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/asus-wl-520gu-7.0.1.45/src/shared/ |
H A D | hndgige.c | 30 sb_gige_init(sb_t *sbh, uint32 unit, bool *rgmii) argument 43 ASSERT(sbh); 46 idx = sb_coreidx(sbh); 49 regs = sb_setcore(sbh, SB_GIGETH, unit); 52 osh = sb_osh(sbh); 59 if (!sb_iscoreup(sbh)) 60 sb_core_reset(sbh, 0, 0); 122 sb_setcoreidx(sbh, idx);
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H A D | hndpmu.c | 32 static void sb_pmu0_pllinit0(sb_t *sbh, osl_t *osh, chipcregs_t *cc, uint32 xtal); 33 static uint32 sb_pmu0_alpclk0(sb_t *sbh, osl_t *osh, chipcregs_t *cc); 34 static uint32 sb_pmu0_cpuclk0(sb_t *sbh, osl_t *osh, chipcregs_t *cc); 38 static void sb_pmu1_pllinit0(sb_t *sbh, osl_t *osh, chipcregs_t *cc, uint32 xtal); 39 static uint32 sb_pmu1_cpuclk0(sb_t *sbh, osl_t *osh, chipcregs_t *cc); 40 static uint32 sb_pmu1_alpclk0(sb_t *sbh, osl_t *osh, chipcregs_t *cc); 45 BCMINITFN(sb_pmu_set_switcher_voltage)(sb_t *sbh, osl_t *osh, argument 51 ASSERT(sbh->cccaps & CC_CAP_PMU); 54 origidx = sb_coreidx(sbh); 55 cc = sb_setcore(sbh, SB_C 69 sb_pmu_set_ldo_voltage(sb_t *sbh, osl_t *osh, uint8 ldo, uint8 voltage) argument 138 sb_pmu_paref_ldo_enable(sb_t *sbh, osl_t *osh, bool enable) argument 167 sb_pmu_fast_pwrup_delay(sb_t *sbh, osl_t *osh) argument 202 sb_pmu_force_ilp(sb_t *sbh, osl_t *osh, bool force) argument 304 sb_pmu_res_init(sb_t *sbh, osl_t *osh) argument 465 sb_pmu0_sbclk4328(sb_t *sbh, int freq) argument 521 sb_pmu0_pllinit0(sb_t *sbh, osl_t *osh, chipcregs_t *cc, uint32 xtal) argument 630 sb_pmu0_alpclk0(sb_t *sbh, osl_t *osh, chipcregs_t *cc) argument 648 sb_pmu0_cpuclk0(sb_t *sbh, osl_t *osh, chipcregs_t *cc) argument 715 sb_pmu1_alpclk0(sb_t *sbh, osl_t *osh, chipcregs_t *cc) argument 736 sb_pmu1_pllinit0(sb_t *sbh, osl_t *osh, chipcregs_t *cc, uint32 xtal) argument 832 sb_pmu1_cpuclk0(sb_t *sbh, osl_t *osh, chipcregs_t *cc) argument 858 sb_pmu_pll_init(sb_t *sbh, osl_t *osh, uint xtalfreq) argument 900 sb_pmu_alp_clock(sb_t *sbh, osl_t *osh) argument 947 sb_pmu_cpu_clock(sb_t *sbh, osl_t *osh) argument 992 sb_pmu_init(sb_t *sbh, osl_t *osh) argument 1018 sb_pmu_otp_power(sb_t *sbh, osl_t *osh, bool on) argument 1056 sb_pmu_rcal(sb_t *sbh, osl_t *osh) argument [all...] |
H A D | sromstubs.c | 24 srom_var_init(sb_t *sbh, uint bus, void *curmap, osl_t *osh, char **vars, uint *count) argument 30 srom_read(sb_t *sbh, uint bus, void *curmap, osl_t *osh, uint byteoff, uint nbytes, uint16 *buf) argument 36 srom_write(sb_t *sbh, uint bus, void *curmap, osl_t *osh, uint byteoff, uint nbytes, uint16 *buf) argument
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H A D | nvramstubs.c | 22 nvram_init(void *sbh) argument 34 nvram_exit(void *sbh) argument
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H A D | hndchipc.c | 58 BCMINITFN(sb_serial_init)(sb_t *sbh, sb_serial_init_fn add) argument 67 osh = sb_osh(sbh); 69 cc = (chipcregs_t *)sb_setcore(sbh, SB_CC, 0); 73 rev = sbh->ccrev; 74 cap = sbh->cccaps; 78 irq = sb_irq(sbh); 89 baud_base = sb_alp_clock(sbh); 100 baud_base = sb_clock(sbh); 142 sb_jtagm_init(sb_t *sbh, uint clkd, bool exttap) argument 146 if ((regs = sb_setcore(sbh, SB_C 224 sb_cc_register_isr(sb_t *sbh, cc_isr_fn isr, uint32 ccintmask, void *cbdata) argument 263 sb_cc_isr(sb_t *sbh, chipcregs_t *regs) argument [all...] |
H A D | hndpci.c | 92 config_cmd(sb_t *sbh, uint bus, uint dev, uint func, uint off) argument 103 osh = sb_osh(sbh); 105 coreidx = sb_coreidx(sbh); 106 regs = (sbpciregs_t *) sb_setcore(sbh, SB_PCI, 0); 132 sb_setcoreidx(sbh, coreidx); 148 sb_pcihb_read_config(sb_t *sbh, uint bus, uint dev, uint func, uint off, argument 161 osh = sb_osh(sbh); 164 coreidx = sb_coreidx(sbh); 165 regs = (sbpciregs_t *)sb_setcore(sbh, SB_PCI, 0); 166 if (regs && sb_corerev(sbh) > 177 extpci_read_config(sb_t *sbh, uint bus, uint dev, uint func, uint off, void *buf, int len) argument 221 extpci_write_config(sb_t *sbh, uint bus, uint dev, uint func, uint off, void *buf, int len) argument 294 sb_pcid_read_config(sb_t *sbh, uint coreidx, sb_pci_cfg_t *cfg, uint off, uint len) argument 328 sb_pcid_write_config(sb_t *sbh, uint coreidx, sb_pci_cfg_t *cfg, uint off, uint len) argument 365 sb_read_config(sb_t *sbh, uint bus, uint dev, uint func, uint off, void *buf, int len) argument 396 sb_write_config(sb_t *sbh, uint bus, uint dev, uint func, uint off, void *buf, int len) argument 450 sbpci_read_config(sb_t *sbh, uint bus, uint dev, uint func, uint off, void *buf, int len) argument 459 sbpci_write_config(sb_t *sbh, uint bus, uint dev, uint func, uint off, void *buf, int len) argument 480 sbpci_init_pci(sb_t *sbh) argument 597 sbpci_arb_park(sb_t *sbh, uint parkid) argument 641 sbpci_init_regions(sb_t *sbh, uint func, pci_config_regs *cfg, sb_bar_cfg_t *bar) argument 691 sbpci_init_cores(sb_t *sbh) argument 798 sbpci_init(sb_t *sbh) argument [all...] |
H A D | sbutils.c | 107 static char *sb_devpathvar(sb_t *sbh, char *var, int len, const char *name); 110 static void sb_war43448(sb_t *sbh); 111 static void sb_war43448_aspm(sb_t *sbh); 112 static void sb_war32414_forceHT(sb_t *sbh, bool forceHT); 114 static void sb_war42767(sb_t *sbh); 115 static void sb_war42767_clkreq(sb_t *sbh); 129 #define SB_INFO(sbh) (sb_info_t*)(uintptr)sbh 538 BCMINITFN(sb_war42780_clkreq)(sb_t *sbh, bool clkreq) argument 542 si = SB_INFO(sbh); 552 sb_war43448(sb_t *sbh) argument 569 sb_war43448_aspm(sb_t *sbh) argument 606 sb_war32414_forceHT(sb_t *sbh, bool forceHT) argument 623 sb_coreid(sb_t *sbh) argument 635 sb_flag(sb_t *sbh) argument 647 sb_coreidx(sb_t *sbh) argument 712 sb_corevendor(sb_t *sbh) argument 724 sb_corerev(sb_t *sbh) argument 738 sb_osh(sb_t *sbh) argument 747 sb_setosh(sb_t *sbh, osl_t *osh) argument 761 sb_coreflags_wo(sb_t *sbh, uint32 mask, uint32 val) argument 779 sb_coreflags(sb_t *sbh, uint32 mask, uint32 val) argument 804 sb_coreflagshi(sb_t *sbh, uint32 mask, uint32 val) argument 828 sb_corebist(sb_t *sbh) argument 852 sb_iscoreup(sb_t *sbh) argument 874 sb_corereg(sb_t *sbh, uint coreidx, uint regoff, uint mask, uint val) argument 1050 sb_pcieclkreq(sb_t *sbh, uint32 mask, uint32 val) argument 1098 sb_pci_pmecap(sb_t *sbh) argument 1127 sb_pci_pmeen(sb_t *sbh) argument 1154 sb_pci_pmeclr(sb_t *sbh) argument 1382 sb_detach(sb_t *sbh) argument 1422 sb_findcoreidx(sb_t *sbh, uint coreid, uint coreunit) argument 1448 sb_setcoreidx(sb_t *sbh, uint coreidx) argument 1531 sb_setcore(sb_t *sbh, uint coreid, uint coreunit) argument 1544 sb_chip(sb_t *sbh) argument 1554 sb_chiprev(sb_t *sbh) argument 1564 sb_chipcrev(sb_t *sbh) argument 1574 sb_chippkg(sb_t *sbh) argument 1584 sb_pcirev(sb_t *sbh) argument 1593 sb_war16165(sb_t *sbh) argument 1612 sb_pcmciarev(sb_t *sbh) argument 1622 sb_boardvendor(sb_t *sbh) argument 1632 sb_boardtype(sb_t *sbh) argument 1669 sb_bus(sb_t *sbh) argument 1679 sb_buscoretype(sb_t *sbh) argument 1690 sb_buscorerev(sb_t *sbh) argument 1700 sb_corelist(sb_t *sbh, uint coreid[]) argument 1712 sb_coreregs(sb_t *sbh) argument 1756 sb_taclear(sb_t *sbh) argument 1863 sb_commit(sb_t *sbh) argument 1903 sb_core_reset(sb_t *sbh, uint32 bits, uint32 resetbits) argument 1946 sb_core_tofixup(sb_t *sbh) argument 2002 sb_set_initiator_to(sb_t *sbh, uint32 to, uint idx) argument 2053 sb_core_disable(sb_t *sbh, uint32 bits) argument 2111 sb_watchdog(sb_t *sbh, uint ticks) argument 2132 sb_pcmcia_init(sb_t *sbh) argument 2148 sb_pci_up(sb_t *sbh) argument 2173 sb_pci_sleep(sb_t *sbh) argument 2190 sb_pci_down(sb_t *sbh) argument 2212 sb_war42767_clkreq(sb_t *sbh) argument 2239 sb_war42767(sb_t *sbh) argument 2262 sb_pci_setup(sb_t *sbh, uint coremask) argument 2413 sb_coreunit(sb_t *sbh) argument 2537 sb_clock(sb_t *sbh) argument 2585 sb_alp_clock(sb_t *sbh) argument 2597 sb_gpiosetcore(sb_t *sbh) argument 2608 sb_gpiocontrol(sb_t *sbh, uint32 mask, uint32 val, uint8 priority) argument 2632 sb_gpioouten(sb_t *sbh, uint32 mask, uint32 val, uint8 priority) argument 2656 sb_gpioout(sb_t *sbh, uint32 mask, uint32 val, uint8 priority) argument 2680 sb_gpioreserve(sb_t *sbh, uint32 gpio_bitmask, uint8 priority) argument 2715 sb_gpiorelease(sb_t *sbh, uint32 gpio_bitmask, uint8 priority) argument 2746 sb_gpioin(sb_t *sbh) argument 2760 sb_gpiointpolarity(sb_t *sbh, uint32 mask, uint32 val, uint8 priority) argument 2781 sb_gpiointmask(sb_t *sbh, uint32 mask, uint32 val, uint8 priority) argument 2802 sb_gpioled(sb_t *sbh, uint32 mask, uint32 val) argument 2816 sb_gpiotimerval(sb_t *sbh, uint32 mask, uint32 gpiotimerval) argument 2829 sb_gpiopull(sb_t *sbh, bool updown, uint32 mask, uint32 val) argument 2843 sb_gpioevent(sb_t *sbh, uint regtype, uint32 mask, uint32 val) argument 2865 sb_gpio_handler_register(sb_t *sbh, uint32 event, bool level, gpio_handler_t cb, void *arg) argument 2894 sb_gpio_handler_unregister(sb_t *sbh, void* gpioh) argument 2927 sb_gpio_handler_process(sb_t *sbh) argument 2949 sb_gpio_int_enable(sb_t *sbh, bool enable) argument 3057 sb_clkctl_init(sb_t *sbh) argument 3090 sb_clkctl_fast_pwrup_delay(sb_t *sbh) argument 3128 sb_clkctl_xtal(sb_t *sbh, uint what, bool on) argument 3205 sb_clkctl_clk(sb_t *sbh, uint mode) argument 3294 sb_register_intr_callback(sb_t *sbh, void *intrsoff_fn, void *intrsrestore_fn, void *intrsenabled_fn, void *intr_arg) argument 3311 sb_deregister_intr_callback(sb_t *sbh) argument 3321 sb_d11_devid(sb_t *sbh) argument 3360 sb_corepciid(sb_t *sbh, uint func, uint16 *pcivendor, uint16 *pcidevice, uint8 *pciclass, uint8 *pcisubclass, uint8 *pciprogif, uint8 *pciheader) argument 3585 sb_t *sbh; local 3616 sb_pcie_writereg(sb_t *sbh, void *arg1, uint offset, uint val) argument 3649 sb_devpath(sb_t *sbh, char *path, int size) argument 3690 sb_getdevpathvar(sb_t *sbh, const char *name) argument 3701 sb_getdevpathintvar(sb_t *sbh, const char *name) argument 3716 sb_devpathvar(sb_t *sbh, char *var, int len, const char *name) argument 3812 sb_backplane64(sb_t *sbh) argument 3821 sb_btcgpiowar(sb_t *sbh) argument 3853 sb_deviceremoved(sb_t *sbh) argument 3876 sb_socram_size(sb_t *sbh) argument [all...] |
H A D | sflash.c | 39 sflash_init(sb_t *sbh, chipcregs_t *cc) argument 44 ASSERT(sbh); 46 osh = sb_osh(sbh); 50 sflash.type = sbh->cccaps & CC_CAP_FLASH_MASK; 152 sflash_read(sb_t *sbh, chipcregs_t *cc, uint offset, uint len, uchar *buf) argument 158 ASSERT(sbh); 173 osh = sb_osh(sbh); 199 sflash_poll(sb_t *sbh, chipcregs_t *cc, uint offset) argument 203 ASSERT(sbh); 205 osh = sb_osh(sbh); 230 sflash_write(sb_t *sbh, chipcregs_t *cc, uint offset, uint length, const uchar *buffer) argument 387 sflash_erase(sb_t *sbh, chipcregs_t *cc, uint offset) argument 420 sflash_commit(sb_t *sbh, chipcregs_t *cc, uint offset, uint len, const uchar *buf) argument [all...] |
H A D | hndmips.c | 61 sb_getirq(sb_t *sbh) argument 70 osh = sb_osh(sbh); 71 flag = sb_flag(sbh); 73 idx = sb_coreidx(sbh); 75 if ((regs = sb_setcore(sbh, SB_MIPS33, 0)) != NULL) { 88 sb_setcoreidx(sbh, idx); 98 sb_irq(sb_t *sbh) argument 100 uint irq = sb_getirq(sbh); 102 irq = sb_flag(sbh) + shirq_map_base; 108 BCMINITFN(sb_clearirq)(sb_t *sbh, uin argument 133 sb_setirq(sb_t *sbh, uint irq, uint coreid, uint coreunit) argument 174 sb_mips_init(sb_t *sbh, uint shirqmap) argument 237 sb_cpu_clock(sb_t *sbh) argument 328 sb_mips_setclock(sb_t *sbh, uint32 mipsclock, uint32 sbclock, uint32 pciclock) argument 998 sb_memc_get_ncdl(sb_t *sbh) argument 1046 hnd_cpu_reset(sb_t *sbh) argument [all...] |
/asus-wl-520gu-7.0.1.45/src/et/sys/ |
H A D | etc_adm.h | 22 extern adm_info_t *adm_attach(sb_t *sbh, char *vars);
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H A D | etc_adm.c | 26 sb_t *sbh; /* SiliconBackplane handle */ member in struct:adm_info_s 39 adm_attach(sb_t *sbh, char *vars) argument 45 if (!(adm = MALLOC(sb_osh(sbh), sizeof(adm_info_t)))) { 46 ET_ERROR(("adm_attach: out of memory, malloc %d bytes", MALLOCED(sb_osh(sbh)))); 50 adm->sbh = sbh; 90 MFREE(sb_osh(adm->sbh), adm, sizeof(adm_info_t)); 107 adm->coreidx = sb_coreidx(adm->sbh); 110 regs = sb_gpiosetcore(adm->sbh); 119 sb_setcoreidx(adm->sbh, ad [all...] |
/asus-wl-520gu-7.0.1.45/src/cfe/cfe/arch/mips/board/bcm947xx/src/ |
H A D | bcm947xx_devs.c | 65 /* Defined as sbh by bsp_config.h for convenience */ 109 if ((gpio = nvram_resetgpio_init ((void *)sbh)) < 0) 114 if (sb_gpioin(sbh) & ((uint32)1 << gpio)) { 117 if (sb_gpioin(sbh) & ((uint32)1 << gpio)) 152 sbh = sb_kattach(SB_OSH); 153 ASSERT(sbh); 157 if ((cfe_cpu_speed = sb_cpu_clock(sbh)) == 0) 161 if (nvram_init((void *)sbh) > 0) 172 } else if (sb_chip(sbh) == BCM4710_DEVICE_ID) { 176 boardtype = sb_boardtype(sbh); [all...] |
/asus-wl-520gu-7.0.1.45/src/linux/linux/arch/mips/brcm-boards/bcm947xx/ |
H A D | time.c | 40 #define sbh bcm947xx_sbh macro 60 if (!(hz = sb_cpu_clock(sbh))) 63 printk("CPU: BCM%04x rev %d at %d MHz\n", sb_chip(sbh), sb_chiprev(sbh), 82 if ((eir = sb_setcore(sbh, SB_EXTIF, 0))) { 121 if (sb_chip(sbh) == BCM5354_CHIP_ID) 122 sb_watchdog(sbh, WATCHDOG_CLOCK_5354 / 1000 * watchdog); 124 sb_watchdog(sbh, WATCHDOG_CLOCK / 1000 * watchdog); 158 sb_watchdog(sbh, 0);
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H A D | pcibios.c | 40 #define sbh bcm947xx_sbh macro 50 ret = sbpci_read_config(sbh, dev->bus->number, PCI_SLOT(dev->devfn), 63 ret = sbpci_read_config(sbh, dev->bus->number, PCI_SLOT(dev->devfn), 76 ret = sbpci_read_config(sbh, dev->bus->number, PCI_SLOT(dev->devfn), 89 ret = sbpci_write_config(sbh, dev->bus->number, PCI_SLOT(dev->devfn), 102 ret = sbpci_write_config(sbh, dev->bus->number, PCI_SLOT(dev->devfn), 115 ret = sbpci_write_config(sbh, dev->bus->number, PCI_SLOT(dev->devfn), 140 sbpci_check(sbh); 154 if (!(sbh = sb_kattach(SB_OSH))) 159 sbpci_init(sbh); [all...] |
/asus-wl-520gu-7.0.1.45/src/linux/linux/drivers/block/ |
H A D | rd.c | 161 static int rd_blkdev_pagecache_IO(int rw, struct buffer_head * sbh, int minor) argument 171 if (sbh->b_page->mapping == mapping) { 173 mark_buffer_uptodate(sbh, 1); 174 SetPageDirty(sbh->b_page); 179 index = sbh->b_rsector >> (PAGE_CACHE_SHIFT - 9); 180 offset = (sbh->b_rsector << 9) & ~PAGE_CACHE_MASK; 181 size = sbh->b_size; 206 dst = bh_kmap(sbh); 210 src = bh_kmap(sbh); 217 bh_kunmap(sbh); 240 rd_make_request(request_queue_t * q, int rw, struct buffer_head *sbh) argument [all...] |