Searched refs:rtl8xxxu_read32 (Results 1 - 10 of 10) sorted by relevance

/linux-master/drivers/net/wireless/realtek/rtl8xxxu/
H A Drtl8xxxu_8188f.c337 sys_cfg = rtl8xxxu_read32(priv, REG_SYS_CFG);
384 val32 = rtl8xxxu_read32(priv, REG_TX_AGC_A_CCK1_MCS32);
389 val32 = rtl8xxxu_read32(priv, REG_TX_AGC_B_CCK11_A_CCK2_11);
448 val32 = rtl8xxxu_read32(priv, REG_OFDM0_RX_D_SYNC_PATH);
453 val32 = rtl8xxxu_read32(priv, REG_OFDM0_RX_D_SYNC_PATH);
458 reg948 = rtl8xxxu_read32(priv, REG_S0S1_PATH_SWITCH);
463 val32 = rtl8xxxu_read32(priv, REG_FPGA0_XB_RF_INT_OE);
471 initial_gain = rtl8xxxu_read32(priv, REG_OFDM0_XA_AGC_CORE1);
474 val32 = rtl8xxxu_read32(priv, REG_FPGA0_RF_MODE);
493 do_notch = rtl8xxxu_read32(pri
[all...]
H A Drtl8xxxu_8723b.c313 sys_cfg = rtl8xxxu_read32(priv, REG_SYS_CFG);
327 val32 = rtl8xxxu_read32(priv, REG_MULTI_FUNC_CTRL);
339 val32 = rtl8xxxu_read32(priv, REG_GPIO_OUTSTS);
415 val32 = rtl8xxxu_read32(priv, REG_TX_AGC_A_CCK1_MCS32);
420 val32 = rtl8xxxu_read32(priv, REG_TX_AGC_B_CCK11_A_CCK2_11);
557 val32 = rtl8xxxu_read32(priv, REG_PAD_CTRL1);
561 val32 = rtl8xxxu_read32(priv, REG_GPIO_MUXCFG);
565 val32 = rtl8xxxu_read32(priv, REG_GPIO_MUXCFG);
569 val32 = rtl8xxxu_read32(priv, REG_LEDCFG0);
573 val32 = rtl8xxxu_read32(pri
[all...]
H A Drtl8xxxu_8710b.c497 val32 = rtl8xxxu_read32(priv, REG_EFUSE_INDIRECT_CTRL_8710B);
504 value = rtl8xxxu_read32(priv, REG_USB_HOST_INDIRECT_DATA_8710B);
533 val32 = rtl8xxxu_read32(priv, REG_EFUSE_INDIRECT_CTRL_8710B);
567 val32 = rtl8xxxu_read32(priv, REG_EFUSE_INDIRECT_CTRL_8710B);
569 val32 = rtl8xxxu_read32(priv, REG_EFUSE_INDIRECT_CTRL_8710B);
577 val32 = rtl8xxxu_read32(priv, REG_USB_HOST_INDIRECT_DATA_8710B);
731 val32 = rtl8xxxu_read32(priv, REG_FPGA0_RF_MODE);
735 val32 = rtl8xxxu_read32(priv, REG_FPGA1_RF_MODE);
741 val32 = rtl8xxxu_read32(priv, REG_CCK0_SYSTEM);
747 val32 = rtl8xxxu_read32(pri
[all...]
H A Drtl8xxxu_8192e.c487 sys_cfg = rtl8xxxu_read32(priv, REG_SYS_CFG);
495 bonding = rtl8xxxu_read32(priv, REG_HPON_FSM);
513 val32 = rtl8xxxu_read32(priv, REG_GPIO_OUTSTS);
540 val32 = rtl8xxxu_read32(priv, REG_TX_AGC_A_CCK1_MCS32);
545 val32 = rtl8xxxu_read32(priv, REG_TX_AGC_B_CCK11_A_CCK2_11);
572 val32 = rtl8xxxu_read32(priv, REG_TX_AGC_B_CCK1_55_MCS32);
577 val32 = rtl8xxxu_read32(priv, REG_TX_AGC_B_CCK11_A_CCK2_11);
747 reg_eac = rtl8xxxu_read32(priv, REG_RX_POWER_AFTER_IQK_A_2);
748 reg_e94 = rtl8xxxu_read32(priv, REG_TX_POWER_BEFORE_IQK_A);
749 reg_e9c = rtl8xxxu_read32(pri
[all...]
H A Drtl8xxxu_8192f.c419 sys_cfg = rtl8xxxu_read32(priv, REG_SYS_CFG);
426 val32 = rtl8xxxu_read32(priv, REG_MULTI_FUNC_CTRL);
435 val32 = rtl8xxxu_read32(priv, REG_GPIO_OUTSTS);
690 agg_rx = rtl8xxxu_read32(priv, REG_RXDMA_AGG_PG_TH);
797 val32 = rtl8xxxu_read32(priv, REG_OFDM0_TX_PSDO_NOISE_WEIGHT);
806 val32 = rtl8xxxu_read32(priv, REG_OFDM0_TX_PSDO_NOISE_WEIGHT);
866 while (rtl8xxxu_read32(priv, REG_IQK_RPT_TXA) == 0 && ktime < 21) {
872 reg_eac = rtl8xxxu_read32(priv, REG_RX_POWER_AFTER_IQK_A_2);
873 reg_e94 = rtl8xxxu_read32(priv, REG_TX_POWER_BEFORE_IQK_A);
874 reg_e9c = rtl8xxxu_read32(pri
[all...]
H A Drtl8xxxu_8188e.c413 sys_cfg = rtl8xxxu_read32(priv, REG_SYS_CFG);
448 rsr = rtl8xxxu_read32(priv, REG_RESPONSE_RATE_SET);
457 val32 = rtl8xxxu_read32(priv, REG_FPGA0_RF_MODE);
461 val32 = rtl8xxxu_read32(priv, REG_FPGA1_RF_MODE);
484 val32 = rtl8xxxu_read32(priv, REG_FPGA0_RF_MODE);
488 val32 = rtl8xxxu_read32(priv, REG_FPGA1_RF_MODE);
496 val32 = rtl8xxxu_read32(priv, REG_CCK0_SYSTEM);
502 val32 = rtl8xxxu_read32(priv, REG_OFDM1_LSTF);
510 val32 = rtl8xxxu_read32(priv, REG_FPGA0_POWER_SAVE);
648 reg_eac = rtl8xxxu_read32(pri
[all...]
H A Drtl8xxxu_core.c700 u32 rtl8xxxu_read32(struct rtl8xxxu_priv *priv, u16 addr) function
830 val32 = rtl8xxxu_read32(priv, addr);
839 val32 = rtl8xxxu_read32(priv, addr);
851 orig = rtl8xxxu_read32(priv, addr);
914 hssia = rtl8xxxu_read32(priv, REG_FPGA0_XA_HSSI_PARM2);
916 val32 = rtl8xxxu_read32(priv, rtl8xxxu_rfregs[path].hssiparm2);
935 val32 = rtl8xxxu_read32(priv, rtl8xxxu_rfregs[path].hssiparm1);
937 retval = rtl8xxxu_read32(priv, rtl8xxxu_rfregs[path].hspiread);
939 retval = rtl8xxxu_read32(priv, rtl8xxxu_rfregs[path].lssiread);
968 val32 = rtl8xxxu_read32(pri
[all...]
H A Drtl8xxxu_8723a.c138 sys_cfg = rtl8xxxu_read32(priv, REG_SYS_CFG);
154 val32 = rtl8xxxu_read32(priv, REG_MULTI_FUNC_CTRL);
166 val32 = rtl8xxxu_read32(priv, REG_GPIO_OUTSTS);
297 val32 = rtl8xxxu_read32(priv, REG_APS_FSMCO);
327 val32 = rtl8xxxu_read32(priv, REG_APS_FSMCO);
332 val32 = rtl8xxxu_read32(priv, REG_APS_FSMCO);
397 val32 = rtl8xxxu_read32(priv, REG_EFUSE_CTRL);
416 val32 = rtl8xxxu_read32(priv, REG_MAC_PHY_CTRL);
H A Drtl8xxxu_8192c.c335 sys_cfg = rtl8xxxu_read32(priv, REG_SYS_CFG);
344 bonding = rtl8xxxu_read32(priv, REG_HPON_FSM);
372 val32 = rtl8xxxu_read32(priv, REG_GPIO_OUTSTS);
579 val32 = rtl8xxxu_read32(priv, REG_FPGA0_XCD_RF_PARM);
H A Drtl8xxxu.h2029 u32 rtl8xxxu_read32(struct rtl8xxxu_priv *priv, u16 addr);

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