Searched refs:reg_mask (Results 1 - 25 of 42) sorted by relevance

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/linux-master/drivers/clk/ux500/
H A Dclk-sysctrl.c27 u8 reg_mask[SYSCTRL_MAX_NUM_PARENTS]; member in struct:clk_sysctrl
40 ret = ab8500_sysctrl_write(clk->reg_sel[0], clk->reg_mask[0],
53 if (ab8500_sysctrl_clear(clk->reg_sel[0], clk->reg_mask[0]))
73 clk->reg_mask[old_index]);
80 clk->reg_mask[index],
85 clk->reg_mask[old_index],
123 u8 *reg_mask,
150 clk->reg_mask[0] = reg_mask[0];
156 clk->reg_mask[
118 clk_reg_sysctrl(struct device *dev, const char *name, const char **parent_names, u8 num_parents, u16 *reg_sel, u8 *reg_mask, u8 *reg_bits, unsigned long rate, unsigned long enable_delay_us, unsigned long flags, const struct clk_ops *clk_sysctrl_ops) argument
178 clk_reg_sysctrl_gate(struct device *dev, const char *name, const char *parent_name, u16 reg_sel, u8 reg_mask, u8 reg_bits, unsigned long enable_delay_us, unsigned long flags) argument
195 clk_reg_sysctrl_gate_fixed_rate(struct device *dev, const char *name, const char *parent_name, u16 reg_sel, u8 reg_mask, u8 reg_bits, unsigned long rate, unsigned long enable_delay_us, unsigned long flags) argument
214 clk_reg_sysctrl_set_parent(struct device *dev, const char *name, const char **parent_names, u8 num_parents, u16 *reg_sel, u8 *reg_mask, u8 *reg_bits, unsigned long flags) argument
[all...]
H A Dclk.h72 u8 reg_mask,
81 u8 reg_mask,
92 u8 *reg_mask,
/linux-master/drivers/power/reset/
H A Datc260x-poweroff.c25 uint reg_mask, reg_val; local
44 reg_mask = ATC2603C_PMU_SYS_CTL3_EN_S2 | ATC2603C_PMU_SYS_CTL3_EN_S3;
46 ret = regmap_update_bits(pwrc->regmap, ATC2603C_PMU_SYS_CTL3, reg_mask,
54 reg_mask = restart ? ATC2603C_PMU_SYS_CTL0_RESTART_EN
60 reg_mask, reg_val);
76 uint reg_mask, reg_val; local
95 reg_mask = ATC2609A_PMU_SYS_CTL3_EN_S2 | ATC2609A_PMU_SYS_CTL3_EN_S3;
97 ret = regmap_update_bits(pwrc->regmap, ATC2609A_PMU_SYS_CTL3, reg_mask,
105 reg_mask = restart ? ATC2609A_PMU_SYS_CTL0_RESTART_EN
111 reg_mask, reg_va
[all...]
/linux-master/include/sound/
H A Dpcm_oss.h72 unsigned int reg_mask; member in struct:snd_pcm_oss
/linux-master/drivers/irqchip/
H A Dirq-mmp.c43 void __iomem *reg_mask; member in struct:icu_chip_data
86 r = readl_relaxed(data->reg_mask) | (1 << hwirq);
87 writel_relaxed(r, data->reg_mask);
115 r = readl_relaxed(data->reg_mask) | (1 << hwirq);
116 writel_relaxed(r, data->reg_mask);
134 r = readl_relaxed(data->reg_mask) & ~(1 << hwirq);
135 writel_relaxed(r, data->reg_mask);
169 mask = readl_relaxed(data->reg_mask);
388 icu_data[i].reg_mask = mmp_icu_base + reg[2];
/linux-master/drivers/net/ethernet/broadcom/bnx2x/
H A Dbnx2x_init.h569 } reg_mask; /* Register mask (all valid bits) */ member in struct:__anon303
695 return bnx2x_blocks_parity_data[idx].reg_mask.e1;
697 return bnx2x_blocks_parity_data[idx].reg_mask.e1h;
699 return bnx2x_blocks_parity_data[idx].reg_mask.e2;
701 return bnx2x_blocks_parity_data[idx].reg_mask.e3;
741 u32 reg_mask = bnx2x_parity_reg_mask(bp, i); local
743 if (reg_mask) {
746 if (reg_val & reg_mask)
750 reg_val & reg_mask);
774 u32 reg_mask local
[all...]
/linux-master/drivers/pci/controller/dwc/
H A Dpcie-al.c126 u8 reg_mask; member in struct:al_pcie_target_bus_cfg
225 unsigned int busnr_reg = busnr & target_bus_cfg->reg_mask;
233 target_bus_cfg->reg_mask);
268 target_bus_cfg->reg_mask = ~target_bus_cfg->ecam_mask;
269 target_bus_cfg->reg_val = bus->start & target_bus_cfg->reg_mask;
272 target_bus_cfg->reg_mask);
/linux-master/drivers/gpu/drm/imagination/
H A Dpvr_device.h564 * @reg_mask: Mask of bits valid for comparison with @reg_value.
573 u32 reg_mask, u64 timeout_usec)
578 (value & reg_mask) == reg_value, 0, timeout_usec);
587 * @reg_mask: Mask of bits valid for comparison with @reg_value.
596 u64 reg_mask, u64 timeout_usec)
601 (value & reg_mask) == reg_value, 0, timeout_usec);
572 pvr_cr_poll_reg32(struct pvr_device *pvr_dev, u32 reg_addr, u32 reg_value, u32 reg_mask, u64 timeout_usec) argument
595 pvr_cr_poll_reg64(struct pvr_device *pvr_dev, u32 reg_addr, u64 reg_value, u64 reg_mask, u64 timeout_usec) argument
/linux-master/drivers/gpio/
H A Dgpio-htc-egpio.c38 int reg_mask; member in struct:egpio_info
192 reg, (egpio->cached_values >> shift) & ei->reg_mask);
199 egpio_writew((egpio->cached_values >> shift) & ei->reg_mask, ei, reg);
245 if (!((egpio->is_out >> shift) & ei->reg_mask))
249 (egpio->cached_values >> shift) & ei->reg_mask,
253 & ei->reg_mask, ei, reg);
301 ei->reg_mask = (1 << pdata->reg_width) - 1;
/linux-master/drivers/net/ethernet/stmicro/stmmac/
H A Dstmmac_mdio.c288 value |= (phyreg << priv->hw->mii.reg_shift) & priv->hw->mii.reg_mask;
328 value |= (phyreg << priv->hw->mii.reg_shift) & priv->hw->mii.reg_mask;
333 value &= ~priv->hw->mii.reg_mask;
334 value |= (devad << priv->hw->mii.reg_shift) & priv->hw->mii.reg_mask;
387 value |= (phyreg << priv->hw->mii.reg_shift) & priv->hw->mii.reg_mask;
428 value |= (phyreg << priv->hw->mii.reg_shift) & priv->hw->mii.reg_mask;
435 value &= ~priv->hw->mii.reg_mask;
436 value |= (devad << priv->hw->mii.reg_shift) & priv->hw->mii.reg_mask;
H A Dcommon.h582 unsigned int reg_mask; /* MII reg mask */ member in struct:mii_regs
617 u32 reg_mask; member in struct:stmmac_rx_routing
H A Ddwmac100_core.c190 mac->mii.reg_mask = 0x000007C0;
/linux-master/drivers/pinctrl/samsung/
H A Dpinctrl-exynos.c55 unsigned long reg_mask; local
60 reg_mask = bank->pctl_offset + bank->eint_mask_offset;
62 reg_mask = our_chip->eint_mask + bank->eint_offset;
66 mask = readl(bank->eint_base + reg_mask);
68 writel(mask, bank->eint_base + reg_mask);
93 unsigned long reg_mask; local
109 reg_mask = bank->pctl_offset + bank->eint_mask_offset;
111 reg_mask = our_chip->eint_mask + bank->eint_offset;
115 mask = readl(bank->eint_base + reg_mask);
117 writel(mask, bank->eint_base + reg_mask);
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/linux-master/drivers/net/phy/
H A Dnxp-tja11xx.c291 u16 reg_mask, reg_val; local
304 reg_mask = MII_CFG1_AUTO_OP | MII_CFG1_LED_MODE_MASK |
309 reg_mask |= MII_CFG1_INTERFACE_MODE_MASK;
315 ret = phy_modify(phydev, MII_CFG1, reg_mask, reg_val);
320 reg_mask = MII_CFG1_INTERFACE_MODE_MASK;
326 ret = phy_modify(phydev, MII_CFG1, reg_mask, reg_val);
/linux-master/drivers/memory/
H A Dstm32-fmc2-ebi.c215 * @reg_mask: the bit that have to be modified in the selected register
231 u32 reg_mask; member in struct:stm32_fmc2_prop
505 regmap_update_bits(ebi->regmap, reg, prop->reg_mask,
506 setup ? prop->reg_mask : 0);
934 .reg_mask = FMC2_BCR1_CCLKEN,
942 .reg_mask = FMC2_BCR_MUXEN,
955 .reg_mask = FMC2_BCR_WAITPOL,
962 .reg_mask = FMC2_BCR_WAITCFG,
970 .reg_mask = FMC2_BCR_WAITEN,
978 .reg_mask
[all...]
/linux-master/drivers/pmdomain/qcom/
H A Dcpr.c462 u32 val, error_steps, reg_mask; local
498 reg_mask = RBCPR_CTL_UP_THRESHOLD_MASK;
499 reg_mask <<= RBCPR_CTL_UP_THRESHOLD_SHIFT;
500 val = reg_mask;
501 cpr_ctl_modify(drv, reg_mask, val);
535 reg_mask = RBCPR_CTL_SW_AUTO_CONT_NACK_DN_EN;
538 cpr_ctl_modify(drv, reg_mask, val);
567 reg_mask = RBCPR_CTL_SW_AUTO_CONT_NACK_DN_EN;
571 reg_mask = RBCPR_CTL_UP_THRESHOLD_MASK;
572 reg_mask <<
[all...]
/linux-master/drivers/pinctrl/ti/
H A Dpinctrl-ti-iodelay.c219 u32 reg_mask, reg_val, tmp_val; local
238 reg_mask = reg->signature_mask;
241 reg_mask |= reg->binary_data_coarse_mask;
250 reg_mask |= reg->binary_data_fine_mask;
265 reg_mask |= reg->lock_mask;
267 r = regmap_update_bits(iod->regmap, cfg->offset, reg_mask, reg_val);
/linux-master/drivers/pinctrl/mvebu/
H A Dpinctrl-armada-37xx.c52 * @reg_mask: Bit mask matching the group in the selection register
64 u32 reg_mask; member in struct:armada_37xx_pin_group
118 .reg_mask = 0, \
128 .reg_mask = _mask, \
138 .reg_mask = _mask, \
148 .reg_mask = _mask, \
159 .reg_mask = _mask, \
350 unsigned int mask = grp->reg_mask;
/linux-master/drivers/media/i2c/
H A Dmt9m111.c142 #define reg_mask(reg, val, mask) mt9m111_reg_mask(client, MT9M111_##reg, \ macro
225 unsigned int reg_mask; member in struct:mt9m111_mode_info
258 .reg_mask = MT9M111_RM_PWR_MASK | MT9M111_RM_SKIP2_MASK,
267 .reg_mask = MT9M111_RM_PWR_MASK | MT9M111_RM_SKIP2_MASK,
277 .reg_mask = MT9M111_RM_PWR_MASK | MT9M111_RM_SKIP2_MASK,
939 mt9m111->current_mode->reg_mask);
/linux-master/drivers/phy/broadcom/
H A Dphy-bcm-ns2-usbdrd.c78 static inline int pll_lock_stat(u32 usb_reg, int reg_mask, argument
84 val, (val & reg_mask), 1,
/linux-master/drivers/tty/serial/8250/
H A D8250_aspeed_vuart.c383 u32 reg_offset, u32 reg_mask)
399 aspeed_vuart_set_sirq_polarity(vuart, (value & reg_mask) == 0);
381 aspeed_vuart_auto_configure_sirq_polarity( struct aspeed_vuart *vuart, struct device_node *syscon_np, u32 reg_offset, u32 reg_mask) argument
/linux-master/drivers/video/fbdev/via/
H A Dhw.c968 int reg_mask; local
977 reg_mask = 0;
986 reg_mask = reg_mask | (BIT0 << j);
993 viafb_write_reg_mask(cr_index, VIACR, data, reg_mask);
995 viafb_write_reg_mask(cr_index, VIASR, data, reg_mask);
/linux-master/tools/lib/bpf/
H A Dgen_loader.c804 __u32 reg_mask; local
843 reg_mask = src_reg_mask();
845 emit(gen, BPF_ALU32_IMM(BPF_AND, BPF_REG_9, reg_mask));
/linux-master/drivers/usb/serial/
H A Df81534.c174 const u8 reg_mask; member in struct:f81534_pin_data
1343 pins->pin[i].reg_addr, pins->pin[i].reg_mask,
1344 value & BIT(i) ? pins->pin[i].reg_mask : 0);
/linux-master/drivers/clk/samsung/
H A Dclk-pll.c80 unsigned int reg_mask)
99 if (readl_relaxed(pll->con_reg) & reg_mask)
107 val & reg_mask, 0, PLL_TIMEOUT_US);
79 samsung_pll_lock_wait(struct samsung_clk_pll *pll, unsigned int reg_mask) argument

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