Searched refs:reg_addr (Results 1 - 25 of 196) sorted by relevance

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/linux-master/drivers/staging/media/atomisp/pci/hive_isp_css_common/host/
H A Dinput_formatter_private.h27 const hrt_address reg_addr,
32 assert((reg_addr % sizeof(hrt_data)) == 0);
33 ia_css_device_store_uint32(INPUT_FORMATTER_BASE[ID] + reg_addr, value);
39 const unsigned int reg_addr)
43 assert((reg_addr % sizeof(hrt_data)) == 0);
44 return ia_css_device_load_uint32(INPUT_FORMATTER_BASE[ID] + reg_addr);
25 input_formatter_reg_store( const input_formatter_ID_t ID, const hrt_address reg_addr, const hrt_data value) argument
H A Dgp_device_private.h27 const unsigned int reg_addr,
32 assert((reg_addr % sizeof(hrt_data)) == 0);
33 ia_css_device_store_uint32(GP_DEVICE_BASE[ID] + reg_addr, value);
39 const hrt_address reg_addr)
43 assert((reg_addr % sizeof(hrt_data)) == 0);
44 return ia_css_device_load_uint32(GP_DEVICE_BASE[ID] + reg_addr);
25 gp_device_reg_store( const gp_device_ID_t ID, const unsigned int reg_addr, const hrt_data value) argument
/linux-master/drivers/staging/media/atomisp/pci/hive_isp_css_include/host/
H A Dgpio_public.h24 \param reg_addr[in] register byte address
31 const unsigned int reg_addr,
37 \param reg_addr[in] register byte address
44 const unsigned int reg_addr);
H A Dgp_device_public.h37 \param reg_addr[in] register byte address
44 const unsigned int reg_addr,
50 \param reg_addr[in] register byte address
57 const hrt_address reg_addr);
H A Dinput_formatter_public.h94 \param reg_addr[in] register byte address
101 const hrt_address reg_addr,
107 \param reg_addr[in] register byte address
114 const unsigned int reg_addr);
H A Dtimed_ctrl_public.h24 \param reg_addr[in] register byte address
31 const unsigned int reg_addr,
/linux-master/drivers/iio/common/st_sensors/
H A Dst_sensors_core.h9 u8 reg_addr, u8 mask, u8 data);
/linux-master/drivers/gpu/drm/imagination/
H A Dpvr_fw_meta.h12 int pvr_meta_cr_read32(struct pvr_device *pvr_dev, u32 reg_addr, u32 *reg_value_out);
/linux-master/drivers/net/ethernet/hisilicon/hns3/hns3pf/
H A Dhclge_mdio.h16 u16 hclge_read_phy_reg(struct hclge_dev *hdev, u16 reg_addr);
17 int hclge_write_phy_reg(struct hclge_dev *hdev, u16 reg_addr, u16 val);
/linux-master/drivers/staging/media/atomisp/pci/css_2401_system/host/
H A Disys_irq_private.h72 unsigned int reg_addr; local
77 reg_addr = ISYS_IRQ_BASE[isys_irqc_id] + (reg_idx * sizeof(hrt_data));
79 "isys irq store at addr(0x%x) val(%u)\n", reg_addr, (unsigned int)value);
81 ia_css_device_store_uint32(reg_addr, value);
88 unsigned int reg_addr;
94 reg_addr = ISYS_IRQ_BASE[isys_irqc_id] + (reg_idx * sizeof(hrt_data));
95 value = ia_css_device_load_uint32(reg_addr);
97 "isys irq load from addr(0x%x) val(%u)\n", reg_addr, (unsigned int)value);
/linux-master/drivers/input/touchscreen/
H A Dedt-ft5x06.c146 struct edt_reg_addr reg_addr; member in struct:edt_ft5x06_ts_data
587 struct edt_reg_addr *reg_addr = &tsdata->reg_addr; local
590 regmap_write(regmap, reg_addr->reg_threshold, tsdata->threshold);
591 regmap_write(regmap, reg_addr->reg_gain, tsdata->gain);
592 if (reg_addr->reg_offset != NO_REGISTER)
593 regmap_write(regmap, reg_addr->reg_offset, tsdata->offset);
594 if (reg_addr->reg_offset_x != NO_REGISTER)
595 regmap_write(regmap, reg_addr->reg_offset_x, tsdata->offset_x);
596 if (reg_addr
982 struct edt_reg_addr *reg_addr = &tsdata->reg_addr; local
1023 struct edt_reg_addr *reg_addr = &tsdata->reg_addr; local
1072 struct edt_reg_addr *reg_addr = &tsdata->reg_addr; local
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/linux-master/drivers/crypto/cavium/nitrox/
H A Dnitrox_mbx.c41 u64 reg_addr; local
43 reg_addr = NPS_PKT_MBOX_VF_PF_PFDATAX(ring);
44 return nitrox_read_csr(ndev, reg_addr);
50 u64 reg_addr; local
52 reg_addr = NPS_PKT_MBOX_PF_VF_PFDATAX(ring);
53 nitrox_write_csr(ndev, reg_addr, value);
127 u64 value, reg_addr; local
132 reg_addr = NPS_PKT_MBOX_INT_LO;
133 value = nitrox_read_csr(ndev, reg_addr);
151 nitrox_write_csr(ndev, reg_addr, BIT_UL
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/linux-master/arch/riscv/kvm/
H A Dvcpu_vector.c98 void **reg_addr)
108 *reg_addr = &cntx->vector.vstart;
111 *reg_addr = &cntx->vector.vl;
114 *reg_addr = &cntx->vector.vtype;
117 *reg_addr = &cntx->vector.vcsr;
120 *reg_addr = &cntx->vector.vlenb;
129 *reg_addr = cntx->vector.datap +
148 void *reg_addr; local
154 rc = kvm_riscv_vcpu_vreg_addr(vcpu, reg_num, reg_size, &reg_addr);
158 if (copy_to_user(uaddr, reg_addr, reg_siz
95 kvm_riscv_vcpu_vreg_addr(struct kvm_vcpu *vcpu, unsigned long reg_num, size_t reg_size, void **reg_addr) argument
174 void *reg_addr; local
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/linux-master/arch/microblaze/kernel/
H A Dptrace.c105 microblaze_reg_t *reg_addr = reg_save_addr(addr, child); local
107 val = *reg_addr;
110 *reg_addr = data;
113 * Be aware that reg_addr is virtual address
117 u32 paddr = virt_to_phys((u32)reg_addr);
119 *reg_addr = data;
/linux-master/drivers/soc/litex/
H A Dlitex_soc_ctrl.c41 static int litex_check_csr_access(void __iomem *reg_addr) argument
45 reg = litex_read32(reg_addr + SCRATCH_REG_OFF);
53 litex_write32(reg_addr + SCRATCH_REG_OFF, SCRATCH_TEST_VALUE);
54 reg = litex_read32(reg_addr + SCRATCH_REG_OFF);
63 litex_write32(reg_addr + SCRATCH_REG_OFF, SCRATCH_REG_VALUE);
/linux-master/drivers/infiniband/hw/qib/
H A Dqib_diag.c342 const u64 __iomem *reg_addr; local
347 reg_addr = (const u64 __iomem *)qib_remap_ioaddr32(dd, regoffs, &limit);
348 if (reg_addr == NULL || limit == 0 || !(dd->flags & QIB_PRESENT)) {
354 reg_end = reg_addr + (count / sizeof(u64));
357 while (reg_addr < reg_end) {
358 u64 data = readq(reg_addr);
364 reg_addr++;
386 u64 __iomem *reg_addr; local
391 reg_addr = (u64 __iomem *)qib_remap_ioaddr32(dd, regoffs, &limit);
392 if (reg_addr
431 const u32 __iomem *reg_addr; local
477 u32 __iomem *reg_addr; local
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/linux-master/drivers/reset/
H A Dreset-meson.c39 void __iomem *reg_addr = data->reg_base + (bank << 2); local
41 writel(BIT(offset), reg_addr); local
53 void __iomem *reg_addr; local
57 reg_addr = data->reg_base + data->param->level_offset + (bank << 2);
61 reg = readl(reg_addr);
63 writel(reg & ~BIT(offset), reg_addr); local
65 writel(reg | BIT(offset), reg_addr);
/linux-master/arch/s390/mm/
H A Dextable.c40 unsigned int reg_addr = FIELD_GET(EX_DATA_REG_ADDR, ex->data); local
45 memset((void *)regs->gprs[reg_addr], 0, len);
66 unsigned int reg_addr = FIELD_GET(EX_DATA_REG_ADDR, ex->data); local
70 addr = regs->gprs[reg_addr];
/linux-master/drivers/media/pci/cx25821/
H A Dcx25821-i2c.c82 cx_write(bus->reg_addr, msg->addr << 25);
106 cx_write(bus->reg_addr, addr);
132 cx_write(bus->reg_addr, addr);
173 cx_write(bus->reg_addr, msg->addr << 25);
198 cx_write(bus->reg_addr, msg->addr << 25);
344 int cx25821_i2c_read(struct cx25821_i2c *bus, u16 reg_addr, int *value) argument
365 addr[0] = (reg_addr >> 8);
366 addr[1] = (reg_addr & 0xff);
378 int cx25821_i2c_write(struct cx25821_i2c *bus, u16 reg_addr, int value) argument
393 buf[0] = reg_addr >>
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/linux-master/sound/arm/
H A Dpxa2xx-ac97-lib.c49 u32 __iomem *reg_addr; local
58 reg_addr = ac97_reg_base +
61 reg_addr = ac97_reg_base +
63 reg_addr += (reg >> 1);
68 val = (readl(reg_addr) & 0xffff);
82 val = (readl(reg_addr) & 0xffff);
93 u32 __iomem *reg_addr; local
100 reg_addr = ac97_reg_base +
103 reg_addr = ac97_reg_base +
105 reg_addr
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/linux-master/drivers/net/ethernet/chelsio/cxgb4vf/
H A Dadapter.h426 * @reg_addr: the register address
430 static inline u32 t4_read_reg(struct adapter *adapter, u32 reg_addr) argument
432 return readl(adapter->regs + reg_addr);
438 * @reg_addr: the register address
443 static inline void t4_write_reg(struct adapter *adapter, u32 reg_addr, u32 val) argument
445 writel(val, adapter->regs + reg_addr);
464 * @reg_addr: the register address
468 static inline u64 t4_read_reg64(struct adapter *adapter, u32 reg_addr) argument
470 return readq(adapter->regs + reg_addr);
476 * @reg_addr
481 t4_write_reg64(struct adapter *adapter, u32 reg_addr, u64 val) argument
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/linux-master/arch/arm64/mm/
H A Dextable.c37 int reg_addr = FIELD_GET(EX_DATA_REG_ADDR, ex->data); local
40 addr = pt_regs_read_reg(regs, reg_addr);
/linux-master/drivers/net/ethernet/hisilicon/hns/
H A Dhns_dsaf_misc.c306 u32 reg_addr; local
315 reg_addr = DSAF_SUB_SC_XGE_RESET_REQ_REG;
317 reg_addr = DSAF_SUB_SC_XGE_RESET_DREQ_REG;
319 dsaf_write_sub(dsaf_dev, reg_addr, reg_val);
343 u32 reg_addr; local
346 reg_addr = DSAF_SUB_SC_DSAF_RESET_REQ_REG;
348 reg_addr = DSAF_SUB_SC_DSAF_RESET_DREQ_REG;
350 dsaf_write_sub(dsaf_dev, reg_addr, msk);
461 u32 reg_addr; local
466 reg_addr
483 u32 reg_addr; local
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/linux-master/drivers/pinctrl/mediatek/
H A Dpinctrl-mtk-common.c69 unsigned int reg_addr; local
73 reg_addr = mtk_get_port(pctl, offset) + pctl->devdata->dir_offset;
77 pctl->devdata->spec_dir_set(&reg_addr, offset);
81 reg_addr = CLR_ADDR(reg_addr, pctl);
83 reg_addr = SET_ADDR(reg_addr, pctl);
85 regmap_write(mtk_get_regmap(pctl, offset), reg_addr, bit); local
91 unsigned int reg_addr; local
95 reg_addr
103 regmap_write(mtk_get_regmap(pctl, offset), reg_addr, bit); local
109 unsigned int reg_addr, offset; local
147 regmap_write(mtk_get_regmap(pctl, pin), reg_addr, bit); local
156 unsigned int i, info_num, reg_addr, bit; local
708 unsigned int reg_addr; local
820 unsigned int reg_addr; local
841 unsigned int reg_addr; local
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/linux-master/arch/riscv/mm/
H A Dextable.c66 int reg_addr = FIELD_GET(EX_DATA_REG_ADDR, ex->data); local
69 addr = regs_get_gpr(regs, reg_addr * sizeof(unsigned long));

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