Searched refs:regUTCL2_MEM_ECC_STATUS_BASE_IDX (Results 1 - 4 of 4) sorted by relevance

/linux-master/drivers/gpu/drm/amd/include/asic_reg/mmhub/
H A Dmmhub_1_8_0_offset.h2651 #define regUTCL2_MEM_ECC_STATUS_BASE_IDX 0 macro
H A Dmmhub_1_7_offset.h4499 #define regUTCL2_MEM_ECC_STATUS_BASE_IDX 0 macro
/linux-master/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_4_2_offset.h6765 #define regUTCL2_MEM_ECC_STATUS_BASE_IDX 0 macro
H A Dgc_9_4_3_offset.h1561 #define regUTCL2_MEM_ECC_STATUS_BASE_IDX 0 macro

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