Searched refs:regPCIE_LC_LINK_WIDTH_CNTL (Results 1 - 2 of 2) sorted by path

/linux-master/drivers/gpu/drm/amd/include/asic_reg/nbio/
H A Dnbio_4_3_0_offset.h6460 #define regPCIE_LC_LINK_WIDTH_CNTL 0x28900a2 macro
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/linux-master/drivers/gpu/drm/amd/include/asic_reg/pcie/
H A Dpcie_6_1_0_offset.h142 #define regPCIE_LC_LINK_WIDTH_CNTL 0x100a2 macro

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