Searched refs:regMMEA1_DRAM_WR_PRI_QUEUING_BASE_IDX (Results 1 - 2 of 2) sorted by last modified time

/linux-master/drivers/gpu/drm/amd/include/asic_reg/mmhub/
H A Dmmhub_1_8_0_offset.h1557 #define regMMEA1_DRAM_WR_PRI_QUEUING_BASE_IDX 0 macro
H A Dmmhub_1_7_offset.h2057 #define regMMEA1_DRAM_WR_PRI_QUEUING_BASE_IDX 0 macro

Completed in 394 milliseconds