Searched refs:regGDS_GWS_VMID0 (Results 1 - 7 of 7) sorted by path

/linux-master/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v11_0.c1682 WREG32_SOC15_OFFSET(GC, 0, regGDS_GWS_VMID0, i, 0);
1700 WREG32_SOC15_OFFSET(GC, 0, regGDS_GWS_VMID0, vmid, 0);
4702 SOC15_REG_OFFSET(GC, 0, regGDS_GWS_VMID0) + vmid,
H A Dgfx_v9_4_3.c1011 WREG32_SOC15_OFFSET(GC, GET_INST(GC, xcc_id), regGDS_GWS_VMID0, i, 0);
1029 WREG32_SOC15_OFFSET(GC, GET_INST(GC, xcc_id), regGDS_GWS_VMID0, vmid, 0);
2233 SOC15_REG_OFFSET(GC, GET_INST(GC, 0), regGDS_GWS_VMID0) + vmid,
/linux-master/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_11_0_0_offset.h4828 #define regGDS_GWS_VMID0 0x20c0 macro
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H A Dgc_11_0_3_offset.h5052 #define regGDS_GWS_VMID0 0x20c0 macro
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H A Dgc_11_5_0_offset.h3801 #define regGDS_GWS_VMID0 0x20c0 macro
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H A Dgc_9_4_2_offset.h1342 #define regGDS_GWS_VMID0 0x1320 macro
H A Dgc_9_4_3_offset.h3522 #define regGDS_GWS_VMID0 0x1320 macro

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