Searched refs:regGCVM_L2_CNTL5 (Results 1 - 8 of 8) sorted by path

/linux-master/drivers/gpu/drm/amd/amdgpu/
H A Dgfxhub_v11_5_0.c255 WREG32_SOC15(GC, 0, regGCVM_L2_CNTL5, tmp);
H A Dgfxhub_v3_0.c252 WREG32_SOC15(GC, 0, regGCVM_L2_CNTL5, tmp);
H A Dgfxhub_v3_0_3.c257 WREG32_SOC15(GC, 0, regGCVM_L2_CNTL5, tmp);
H A Dimu_v11_0.c224 IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCVM_L2_CNTL5, 0x00003fe0, 0xe0000000),
307 IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCVM_L2_CNTL5, 0x00003fe0, 0xe0000000),
H A Dimu_v11_0_3.c86 IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCVM_L2_CNTL5, 0x00003fe0, 0xe0000000),
/linux-master/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_11_0_0_offset.h2788 #define regGCVM_L2_CNTL5 0x15da macro
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H A Dgc_11_0_3_offset.h2930 #define regGCVM_L2_CNTL5 0x15de macro
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H A Dgc_11_5_0_offset.h1917 #define regGCVM_L2_CNTL5 0x15de macro
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