Searched refs:regGCVM_CONTEXT0_CNTL (Results 1 - 8 of 8) sorted by last modified time

/linux-master/drivers/gpu/drm/amd/amdgpu/
H A Dimu_v11_0.c214 IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCVM_CONTEXT0_CNTL, 0x00000000, 0xe0000000),
225 IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCVM_CONTEXT0_CNTL, 0x00000001, 0xe0000000),
292 IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCVM_CONTEXT0_CNTL, 0x00000000, 0xe0000000),
308 IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCVM_CONTEXT0_CNTL, 0x00000001, 0xe0000000),
H A Dgfxhub_v3_0_3.c264 tmp = RREG32_SOC15(GC, 0, regGCVM_CONTEXT0_CNTL);
269 WREG32_SOC15(GC, 0, regGCVM_CONTEXT0_CNTL, tmp);
381 WREG32_SOC15_OFFSET(GC, 0, regGCVM_CONTEXT0_CNTL,
468 SOC15_REG_OFFSET(GC, 0, regGCVM_CONTEXT0_CNTL);
474 hub->ctx_distance = regGCVM_CONTEXT1_CNTL - regGCVM_CONTEXT0_CNTL;
H A Dgfxhub_v3_0.c259 tmp = RREG32_SOC15(GC, 0, regGCVM_CONTEXT0_CNTL);
264 WREG32_SOC15(GC, 0, regGCVM_CONTEXT0_CNTL, tmp);
388 WREG32_SOC15_OFFSET(GC, 0, regGCVM_CONTEXT0_CNTL,
480 SOC15_REG_OFFSET(GC, 0, regGCVM_CONTEXT0_CNTL);
486 hub->ctx_distance = regGCVM_CONTEXT1_CNTL - regGCVM_CONTEXT0_CNTL;
H A Dgfxhub_v11_5_0.c262 tmp = RREG32_SOC15(GC, 0, regGCVM_CONTEXT0_CNTL);
267 WREG32_SOC15(GC, 0, regGCVM_CONTEXT0_CNTL, tmp);
391 WREG32_SOC15_OFFSET(GC, 0, regGCVM_CONTEXT0_CNTL,
483 SOC15_REG_OFFSET(GC, 0, regGCVM_CONTEXT0_CNTL);
489 hub->ctx_distance = regGCVM_CONTEXT1_CNTL - regGCVM_CONTEXT0_CNTL;
H A Dimu_v11_0_3.c76 IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCVM_CONTEXT0_CNTL, 0x00000000, 0xe0000000),
87 IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCVM_CONTEXT0_CNTL, 0x00000001, 0xe0000000),
/linux-master/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_11_0_0_offset.h2850 #define regGCVM_CONTEXT0_CNTL 0x1688 macro
[all...]
H A Dgc_11_5_0_offset.h2015 #define regGCVM_CONTEXT0_CNTL 0x168c macro
[all...]
H A Dgc_11_0_3_offset.h3024 #define regGCVM_CONTEXT0_CNTL 0x1698 macro
[all...]

Completed in 914 milliseconds