Searched refs:regCP_HQD_PQ_RPTR (Results 1 - 8 of 8) sorted by last modified time
| /linux-master/drivers/gpu/drm/amd/amdgpu/ |
| H A D | mes_v11_0.c | 1211 WREG32_SOC15(GC, 0, regCP_HQD_PQ_RPTR, 0);
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| H A D | gfx_v9_4_3.c | 1641 mqd->cp_hqd_pq_rptr = RREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_HQD_PQ_RPTR);
1701 WREG32_SOC15_RLC(GC, GET_INST(GC, xcc_id), regCP_HQD_PQ_RPTR,
1815 WREG32_SOC15_RLC(GC, GET_INST(GC, xcc_id), regCP_HQD_PQ_RPTR, 0);
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| H A D | gfx_v11_0.c | 3869 mqd->cp_hqd_pq_rptr = RREG32_SOC15(GC, 0, regCP_HQD_PQ_RPTR);
3929 WREG32_SOC15(GC, 0, regCP_HQD_PQ_RPTR,
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| /linux-master/drivers/gpu/drm/amd/include/asic_reg/gc/ |
| H A D | gc_11_0_0_offset.h | 4620 #define regCP_HQD_PQ_RPTR 0x1fb3 macro
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| H A D | gc_11_5_0_offset.h | 3593 #define regCP_HQD_PQ_RPTR 0x1fb3 macro
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| H A D | gc_9_4_3_offset.h | 3302 #define regCP_HQD_PQ_RPTR 0x124f macro
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| H A D | gc_11_0_3_offset.h | 4844 #define regCP_HQD_PQ_RPTR 0x1fb3 macro
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| H A D | gc_9_4_2_offset.h | 713 #define regCP_HQD_PQ_RPTR 0x124f macro
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