Searched refs:reg0 (Results 1 - 25 of 76) sorted by relevance

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/linux-master/arch/s390/include/asm/
H A Dap.h73 unsigned long reg0 = AP_MKQID(0, 0); local
77 " lgr 0,%[reg0]\n" /* qid into gr0 */
85 : [reg0] "d" (reg0)
180 unsigned long reg0 = qid | (1UL << 24); /* fc 1UL is RAPQ */ local
184 reg0 |= 1UL << 22;
187 " lgr 0,%[reg0]\n" /* qid arg into gr0 */
191 : [reg0] "d" (reg0)
205 unsigned long reg0 local
249 unsigned long reg0 = 4UL << 24; /* fc 4UL is QCI */ local
302 unsigned long reg0 = qid | (3UL << 24); /* fc 3UL is AQIC */ local
350 unsigned long reg0 = qid | (5UL << 24) | ((ifbit & 0x01) << 22); local
380 unsigned long reg0 = qid | (7UL << 24); /* fc 7 is BAPQ */ local
406 unsigned long reg0 = qid | (8UL << 24); /* fc 8 is AAPQ */ local
438 unsigned long reg0 = qid | 0x40000000UL; /* 0x4... is last msg part */ local
497 unsigned long reg0 = resgr0 && *resgr0 ? *resgr0 : qid | 0x80000000UL; local
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H A Dfacility.h71 unsigned long reg0 = size - 1; local
74 " lgr 0,%[reg0]\n"
76 " lgr %[reg0],0\n"
77 : [reg0] "+&d" (reg0), [list] "+Q" (*stfle_fac_list)
80 return reg0;
H A Dtimex.h144 unsigned int reg0 = func; \
149 " lgr 0,%[reg0]\n" \
155 : [reg0] "d" (reg0), [reg1] "d" (reg1) \
/linux-master/drivers/media/dvb-frontends/
H A Da8293.c29 u8 reg0, reg1; local
105 reg0 = idx_to_reg[this_volt_idx+1];
106 reg0 |= A8293_FLAG_ODT;
108 ret = i2c_master_send(client, &reg0, 1);
111 dev->reg[0] = reg0;
116 reg0 = idx_to_reg[new_volt_idx];
117 reg0 |= A8293_FLAG_ODT;
118 ret = i2c_master_send(client, &reg0, 1);
121 dev->reg[0] = reg0;
148 u8 reg0, reg local
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H A Dves1820.c30 u8 reg0; member in struct:ves1820_state
82 u8 reg0, enum fe_spectral_inversion inversion)
84 reg0 |= state->reg0 & 0x62;
87 if (!state->config->invert) reg0 |= 0x20;
88 else reg0 &= ~0x20;
90 if (!state->config->invert) reg0 &= ~0x20;
91 else reg0 |= 0x20;
94 ves1820_writereg(state, 0x00, reg0 & 0xfe);
95 ves1820_writereg(state, 0x00, reg0 |
81 ves1820_setup_reg0(struct ves1820_state *state, u8 reg0, enum fe_spectral_inversion inversion) argument
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H A Dtua6100.c43 u8 reg0[] = { 0x00, 0x00 }; local
44 struct i2c_msg msg = { .addr = priv->i2c_address, .flags = 0, .buf = reg0, .len = 2 };
63 u8 reg0[] = { 0x00, 0x00 }; local
66 struct i2c_msg msg0 = { .addr = priv->i2c_address, .flags = 0, .buf = reg0, .len = 2 };
76 reg0[1] = 0x03;
78 reg0[1] = 0x07;
H A Dtda10021.c31 u8 reg0; member in struct:tda10021_state
119 static int tda10021_setup_reg0(struct tda10021_state *state, u8 reg0, argument
122 reg0 |= state->reg0 & 0x63;
125 reg0 &= ~0x20;
127 reg0 |= 0x20;
129 _tda10021_writereg (state, 0x00, reg0 & 0xfe);
130 _tda10021_writereg (state, 0x00, reg0 | 0x01);
132 state->reg0 = reg0;
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H A Dtda10023.c38 u8 reg0; member in struct:tda10023_state
144 static int tda10023_setup_reg0 (struct tda10023_state* state, u8 reg0) argument
146 reg0 |= state->reg0 & 0x63;
148 tda10023_writereg (state, 0x00, reg0 & 0xfe);
149 tda10023_writereg (state, 0x00, reg0 | 0x01);
151 state->reg0 = reg0;
466 p->modulation = ((state->reg0 >> 2) & 7) + QAM_16;
529 state->reg0
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H A Dstv6110.c384 u8 reg0[] = { 0x00, 0x07, 0x11, 0xdc, 0x85, 0x17, 0x01, 0xe6, 0x1e }; local
390 .buf = reg0,
397 reg0[2] &= ~0xc0;
398 reg0[2] |= (config->clk_div << 6);
421 memcpy(&priv->regs, &reg0[1], 8);
H A Dm88rs2000.c241 u8 reg0, reg1; local
245 reg0 = m88rs2000_readreg(state, 0xb1);
249 m88rs2000_writereg(state, 0xb1, reg0);
259 u8 reg0, reg1; local
261 reg0 = m88rs2000_readreg(state, 0xb1);
268 reg0 |= 0x4;
269 reg0 &= 0xbc;
278 m88rs2000_writereg(state, 0xb1, reg0);
/linux-master/crypto/
H A Daria_generic.c32 u32 reg0, reg1, reg2, reg3; local
43 reg0 = w0[0] ^ ck[0];
48 aria_subst_diff_odd(&reg0, &reg1, &reg2, &reg3);
67 w1[0] ^= reg0;
72 reg0 = w1[0];
77 reg0 ^= ck[4];
82 aria_subst_diff_even(&reg0, &reg1, &reg2, &reg3);
84 reg0 ^= w0[0];
89 w2[0] = reg0;
94 reg0
200 u32 reg0, reg1, reg2, reg3; local
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/linux-master/arch/arm64/crypto/
H A Daes-cipher-core.S20 .macro __pair1, sz, op, reg0, reg1, in0, in1e, in1d, shift
22 ubfiz \reg0, \in0, #2, #8
25 ubfx \reg0, \in0, #\shift, #8
37 ldr \reg0, [tt, \reg0, uxtw #2]
41 lsl \reg0, \reg0, #2
44 ldrb \reg0, [tt, \reg0, uxtw]
49 .macro __pair0, sz, op, reg0, reg
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/linux-master/arch/sparc/kernel/
H A Dprom_32.c141 unsigned int reg0; local
150 reg0 = (unsigned int)dp->phandle;
153 reg0 = regs->phys_addr;
163 sprintf(tmp_buf, "%s@%x,%x", name, *intr, reg0);
/linux-master/drivers/net/wireless/ath/ath10k/
H A Dspectral.c71 u32 reg0, reg1; local
82 reg0 = __le32_to_cpu(fftr->reg0);
119 fft_sample->max_index = MS(reg0, SEARCH_FFT_REPORT_REG0_PEAK_SIDX);
122 total_gain_db = MS(reg0, SEARCH_FFT_REPORT_REG0_TOTAL_GAIN_DB);
123 base_pwr_db = MS(reg0, SEARCH_FFT_REPORT_REG0_BASE_PWR_DB);
132 chain_idx = MS(reg0, SEARCH_FFT_REPORT_REG0_FFT_CHN_IDX);
/linux-master/drivers/gpu/drm/gma500/
H A Dintel_gmbus.c262 GMBUS_REG_WRITE(GMBUS0 + reg_offset, bus->reg0);
350 bus->reg0 & 0xff, bus->adapter.name);
354 bus->force_bit = intel_gpio_create(dev_priv, bus->reg0 & 0xff);
428 bus->reg0 = i | GMBUS_RATE_100KHZ;
458 bus->reg0 = (bus->reg0 & ~(0x3 << 8)) | (speed << 8);
469 bus->reg0 & 0xff);
/linux-master/tools/perf/arch/x86/tests/
H A Dintel-pt-test.c404 unsigned int m, reg, reg0; local
412 reg0 = m & caps0->subleaf[i].reg[j];
413 if ((reg & reg0) != reg0) {
415 cpu, i, j, reg, reg0);
423 reg0 = m & caps0->subleaf[1].eax;
424 if (reg < reg0) {
426 cpu, reg, reg0);
/linux-master/drivers/tee/optee/
H A Doptee_private.h356 static inline void *reg_pair_to_ptr(u32 reg0, u32 reg1) argument
358 return (void *)(unsigned long)(((u64)reg0 << 32) | reg1);
361 static inline void reg_pair_from_64(u32 *reg0, u32 *reg1, u64 val) argument
363 *reg0 = val >> 32;
/linux-master/drivers/net/ethernet/marvell/octeon_ep/
H A Doctep_cnxk_pf.c405 u64 reg0; local
407 reg0 = octep_read_csr64(oct, CNXK_SDP_EPF_MBOX_RINT(0));
408 if (reg0) {
413 if (!(reg0 & (0x1UL << vf_mbox_queue)))
422 if (reg0)
423 octep_write_csr64(oct, CNXK_SDP_EPF_MBOX_RINT(0), reg0);
438 u64 reg0; local
441 reg0 = octep_read_csr64(oct, CNXK_SDP_EPF_OEI_RINT);
442 if (reg0) {
443 octep_write_csr64(oct, CNXK_SDP_EPF_OEI_RINT, reg0);
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/linux-master/drivers/pci/controller/
H A Dpcie-altera.c120 u32 reg0; member in struct:tlp_rp_regpair_t
171 cra_writel(pcie, tlp_rp_regdata->reg0, RP_TX_REG0);
176 static void s10_tlp_write_tx(struct altera_pcie *pcie, u32 reg0, u32 ctrl) argument
178 cra_writel(pcie, reg0, RP_TX_REG0);
203 u32 reg0, reg1; local
213 reg0 = cra_readl(pcie, RP_RXCPL_REG0);
226 *value = reg0;
289 tlp_rp_regdata.reg0 = headers[0];
295 tlp_rp_regdata.reg0 = headers[2];
300 tlp_rp_regdata.reg0
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/linux-master/drivers/net/ethernet/8390/
H A Dwd.c261 int reg0 = inb(ioaddr); local
262 if (reg0 == 0xff || reg0 == 0) {
271 dev->mem_start = ((reg0&0x3f) << 13) + (high_addr_bits << 19);
378 ei_status.reg0 = ((dev->mem_start>>13) & 0x3f) | WD_MEMENB;
383 outb(ei_status.reg0, ioaddr); /* WD_CMDREG */
493 outb(ei_status.reg0 & ~WD_MEMENB, wd_cmdreg);
H A Dne2k-pci.c100 #define ne2k_flags reg0
233 int irq, reg0, chip_idx = ent->driver_data; local
259 reg0 = inb(ioaddr);
260 if (reg0 == 0xFF)
274 outb(reg0, ioaddr);
/linux-master/drivers/media/cec/platform/meson/
H A Dao-cec-g12a.c229 u32 reg0, reg1; local
231 regmap_read(dualdiv_clk->regmap, CECB_CLK_CNTL_REG0, &reg0);
237 if (reg0 & CECB_CLK_CNTL_DUAL_EN) {
240 n1 = FIELD_GET(CECB_CLK_CNTL_N1, reg0) + 1;
241 n2 = FIELD_GET(CECB_CLK_CNTL_N2, reg0) + 1;
255 n1 = FIELD_GET(CECB_CLK_CNTL_N1, reg0) + 1;
/linux-master/arch/mips/include/asm/octeon/
H A Dcvmx-pko.h181 * The size of the reg0 operation - could be 8, 16,
197 /* The register, subtract will be done if reg0 is non-zero */
198 uint64_t reg0:11; member in struct:cvmx_pko_command_word0::__anon23
255 uint64_t reg0:11;
/linux-master/drivers/net/ethernet/netronome/nfp/bpf/
H A Dverifier.c314 const struct bpf_reg_state *reg0 = cur_regs(env) + BPF_REG_0; local
320 if (!(reg0->type == SCALAR_VALUE && tnum_is_const(reg0->var_off))) {
323 tnum_strn(tn_buf, sizeof(tn_buf), reg0->var_off);
325 reg0->type, tn_buf);
329 imm = reg0->var_off.value;
335 reg0->type, imm);
/linux-master/drivers/media/platform/ti/cal/
H A Dcal-camerarx.c135 unsigned int reg0, reg1; local
148 reg0 = camerarx_read(phy, CAL_CSI2_PHY_REG0);
149 cal_set_field(&reg0, CAL_CSI2_PHY_REG0_HSCLOCKCONFIG_DISABLE,
151 cal_set_field(&reg0, ths_term, CAL_CSI2_PHY_REG0_THS_TERM_MASK);
152 cal_set_field(&reg0, ths_settle, CAL_CSI2_PHY_REG0_THS_SETTLE_MASK);
154 phy_dbg(1, phy, "CSI2_%d_REG0 = 0x%08x\n", phy->instance, reg0);
155 camerarx_write(phy, CAL_CSI2_PHY_REG0, reg0);

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