/barrelfish-master/usr/tests/timer/ |
H A D | timer.c | 144 int r1, r2; local 146 r1 = is_stopped(&for_t1); 148 if(r1 && r2){ 182 int r1, r2, r3; local 185 r1 = is_stopped(&for_t1); 189 if(r1 && r2 && r3){
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/barrelfish-master/usr/drivers/imx8x/sdhc/ |
H A D | sdhc.c | 316 uint32_t r1 = sdhc_cmd_rsp1_rd(&sd->dev); local 320 cmd->response[1] = (r2 << 8) | (r1 >> 24); 321 cmd->response[2] = (r1 << 8) | (r0 >> 24);
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/barrelfish-master/usr/bench/ahci/ |
H A D | main.c | 310 double r1, r2, r3; local 311 r1 = dd_bench(source, target, blocksize, count); 314 double kbps = (r1 + r2 + r3) / 3; 343 struct bench_res r1, r2, r3; local 344 fill_bench(target, buffer, blocksize, count, &r1); 347 double write_kbps = (r1.write + r2.write + r3.write) / 3; 348 double read_kbps = (r1.read + r2.read + r3.read) / 3; 350 double write_var = (write_kbps - r1.write) * (write_kbps - r1.write); 356 double read_var = (read_kbps - r1 596 struct bench_res r1, r2, r3; local 739 struct bench_res r1, r2, r3; local [all...] |
/barrelfish-master/tools/arm_molly/ |
H A D | molly_boot32.S | 21 * r1 contains board id 61 mov r0, r1
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/barrelfish-master/lib/cxx/unwind/ |
H A D | UnwindRegistersSave.S | 509 subi %r4, %r1, 16 569 stw %r1, 12(%r3) 648 subi %r4, %r1, 16 775 mov r1, r8 778 stm r0!, {r1-r3} 779 mov r1, r11 782 str r1, [r0, #0] @ r11 912 l.sw 4(r3), r1
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H A D | UnwindRegistersRestore.S | 146 // skip r1 for now 325 subi %r4, %r1, 16 407 // skip r1 for now 478 subi %r4, %r1, 16 556 lwz %r1, 12(%r3) // do sp now 633 @ r8-r11: ldm into r1-r4, then mov to r8-r11 635 ldm r0!, {r1-r4} 637 mov r8, r1 770 l.lwz r1, 4(r3)
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/barrelfish-master/lib/crt/arch/arm/ |
H A D | crt0.S | 24 mov r1, #0 35 mov r1, #1
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/barrelfish-master/lib/compiler-rt/builtins/ |
H A D | fp_lib.h | 92 const uint64_t r1 = hiWord(plolo) + loWord(plohi) + loWord(philo); local 93 *lo = r0 + (r1 << 32); 95 *hi = hiWord(plohi) + hiWord(philo) + hiWord(r1) + phihi; 182 const __uint128_t r1 = (sum0 >> 64) + ((sum1 >> 32) & Word_FullMask) + local 185 *lo = r0 + (r1 << 64); 186 *hi = (r1 >> 64) + (sum1 >> 96) + (sum2 >> 64) + (sum3 >> 32) + sum4 +
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/barrelfish-master/lib/compiler-rt/builtins/arm/ |
H A D | umodsi3.S | 26 tst r1, r1 28 udiv r2, r0, r1 29 mls r0, r2, r1, r0 32 cmp r1, #1 37 cmp r0, r1 43 // r0 is the numerator, r1 the denominator. 46 // r0 and (r1 << I) have the highest bit set in the same position. 53 // that (r0 << shift) < 2 * r1. The quotient is stored in r3. 57 clz r3, r1 [all...] |
H A D | unorddf2vfp.S | 24 vmov d6, r0, r1 // load r0/r1 pair in double register
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H A D | unordsf2vfp.S | 25 vmov s15, r1 // move from GPR 1 to float register
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H A D | udivsi3.S | 29 tst r1, r1 31 udiv r0, r0, r1 43 cmp r1, #1 53 cmp r0, r1 67 // r0 is the numerator, r1 the denominator. 70 // r0 and (r1 << I) have the highest bit set in the same position. 77 // that (r0 << shift) < 2 * r1. The quotient is stored in r3. 81 clz r3, r1 82 // r0 >= r1 implie [all...] |
H A D | udivmodsi4.S | 28 tst r1, r1 31 udiv r0, r3, r1 32 mls r1, r0, r1, r3 33 str r1, [r2] 36 cmp r1, #1 39 cmp r0, r1 44 // r0 is the numerator, r1 the denominator. 47 // r0 and (r1 << [all...] |
H A D | truncdfsf2vfp.S | 24 vmov d7, r0, r1 // load double from r0/r1 pair
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H A D | sync-ops.h | 25 op(r2, r0, r1); \ 40 LOCAL_LABEL(tryatomic_##op) : ldrexd r0, r1, [r12]; \ 41 op(r4, r5, r0, r1, r2, r3); \
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H A D | subsf3vfp.S | 25 vmov s15, r1 // move second param from r1 into float register
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H A D | subdf3vfp.S | 23 vmov d6, r0, r1 // move first param from r0/r1 pair into d6 26 vmov r0, r1, d6 // move result back to r0/r1 pair
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H A D | nesf2vfp.S | 25 vmov s15, r1 // move from GPR 1 to float register
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H A D | muldf3vfp.S | 23 vmov d6, r0, r1 // move first param from r0/r1 pair into d6 26 vmov r0, r1, d6 // move result back to r0/r1 pair
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H A D | mulsf3vfp.S | 24 vmov s15, r1 // move second param from r1 into float register
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H A D | nedf2vfp.S | 23 vmov d6, r0, r1 // load r0/r1 pair in double register
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H A D | negdf2vfp.S | 23 eor r1, r1, #-2147483648 // flip sign bit on double in r0/r1 pair
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H A D | modsi3.S | 32 tst r1, r1 34 sdiv r2, r0, r1 35 mls r0, r2, r1, r0 46 eor r3, r1, r1, asr #31 48 sub r1, r3, r1, asr #31
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H A D | lesf2vfp.S | 25 vmov s15, r1 // move from GPR 1 to float register
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H A D | ltdf2vfp.S | 24 vmov d6, r0, r1 // load r0/r1 pair in double register
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