Searched refs:q_no (Results 1 - 25 of 34) sorted by relevance

12

/linux-master/drivers/net/ethernet/cavium/liquidio/
H A Dcn23xx_vf_device.c54 u32 q_no; local
57 for (q_no = 0; q_no < num_queues; q_no++) {
60 CN23XX_VF_SLI_IQ_PKT_CONTROL64(q_no));
62 octeon_write_csr64(oct, CN23XX_VF_SLI_IQ_PKT_CONTROL64(q_no),
67 for (q_no = 0; q_no < num_queues; q_no++) {
69 CN23XX_VF_SLI_IQ_PKT_CONTROL64(q_no));
105 u64 q_no, intr_threshold; local
154 u32 q_no; local
318 u32 q_no; local
408 u32 q_no, count = 0; local
547 u32 q_no, time_threshold; local
587 u32 q_no; local
[all...]
H A Dcn23xx_pf_device.c349 u32 q_no, srn, ern; local
359 for (q_no = srn; q_no < ern; q_no++) {
361 d64 = octeon_read_csr64(oct, CN23XX_SLI_IQ_PKT_CONTROL64(q_no));
363 octeon_write_csr64(oct, CN23XX_SLI_IQ_PKT_CONTROL64(q_no), d64);
367 for (q_no = srn; q_no < ern; q_no++) {
369 CN23XX_SLI_IQ_PKT_CONTROL64(q_no));
405 u32 q_no, ern, srn; local
478 u32 q_no, ern, srn; local
684 u32 q_no, i; local
714 u32 q_no, i; local
773 u32 q_no, i; local
791 u32 srn, ern, q_no; local
867 int q_no, loop; local
986 u32 i, q_no; local
[all...]
H A Docteon_mailbox.h68 u32 q_no; member in struct:octeon_mbox_cmd
91 u32 q_no; member in struct:octeon_mbox
123 int octeon_mbox_cancel(struct octeon_device *oct, int q_no);
H A Docteon_droq.h248 u32 q_no; member in struct:octeon_droq
333 * @param q_no - droq no. ranges from 0 - 3.
338 u32 q_no,
347 * @param q_no - droq no. ranges from 0 - 3.
350 int octeon_delete_droq(struct octeon_device *oct_dev, u32 q_no);
354 * on output queues given by q_no irrespective of the type of packet.
359 * @param q_no - octeon output queue number (0 <= q_no <= MAX_OCTEON_DROQ-1
365 u32 q_no,
371 * given by q_no
[all...]
H A Docteon_droq.c199 int octeon_delete_droq(struct octeon_device *oct, u32 q_no) argument
201 struct octeon_droq *droq = oct->droq[q_no];
203 dev_dbg(&oct->pci_dev->dev, "%s[%d]\n", __func__, q_no);
213 oct->io_qmask.oq &= ~(1ULL << q_no);
214 vfree(oct->droq[q_no]);
215 oct->droq[q_no] = NULL;
223 u32 q_no,
233 dev_dbg(&oct->pci_dev->dev, "%s[%d]\n", __func__, q_no);
235 droq = oct->droq[q_no];
239 droq->q_no
222 octeon_init_droq(struct octeon_device *oct, u32 q_no, u32 num_descs, u32 desc_size, void *app_ctx) argument
828 octeon_enable_irq(struct octeon_device *oct, u32 q_no) argument
868 octeon_register_droq_ops(struct octeon_device *oct, u32 q_no, struct octeon_droq_ops *ops) argument
897 octeon_unregister_droq_ops(struct octeon_device *oct, u32 q_no) argument
929 octeon_create_droq(struct octeon_device *oct, u32 q_no, u32 num_descs, u32 desc_size, void *app_ctx) argument
[all...]
H A Docteon_mailbox.c65 mbox->mbox_req.q_no = mbox->q_no;
77 mbox->mbox_resp.q_no = mbox->q_no;
134 struct octeon_mbox *mbox = oct->mbox[mbox_cmd->q_no];
262 mbox->q_no);
263 pcie_flr(oct->sriov_info.dpiring_to_vfpcidev_lut[mbox->q_no]);
355 int octeon_mbox_cancel(struct octeon_device *oct, int q_no) argument
357 struct octeon_mbox *mbox = oct->mbox[q_no];
H A Docteon_device.c901 txpciq.s.q_no = iq_no;
962 u32 q_no; local
968 for (q_no = 0; q_no < oct->sriov_info.rings_per_vf; q_no++) {
970 oct, CN23XX_VF_SLI_IQ_PKT_CONTROL64(q_no));
976 oct, CN23XX_SLI_IQ_PKT_CONTROL64(q_no));
982 q_no);
988 CN23XX_SLI_IQ_PKT_CONTROL64(q_no),
992 oct, CN23XX_SLI_IQ_PKT_CONTROL64(q_no));
1004 octeon_set_droq_pkt_op(struct octeon_device *oct, u32 q_no, u32 enable) argument
1282 octeon_get_tx_qsize(struct octeon_device *oct, u32 q_no) argument
1293 octeon_get_rx_qsize(struct octeon_device *oct, u32 q_no) argument
[all...]
H A Dlio_core.c176 nctrl.iq_no = lio->linfo.txpciq[0].s.q_no;
443 struct cavium_wq *wq = &lio->rxq_status_wq[droq->q_no];
454 int q_no = wk->ctxul; local
455 struct octeon_droq *droq = oct->droq[q_no];
469 int q, q_no; local
472 q_no = lio->linfo.rxpciq[q].s.q_no;
473 wq = &lio->rxq_status_wq[q_no];
484 wq->wk.ctxul = q_no;
496 int q_no; local
542 octeon_setup_droq(struct octeon_device *oct, int q_no, int num_descs, int desc_size, void *app_ctx) argument
823 int q, q_no; local
[all...]
H A Docteon_nic.h85 u32 q_no; member in struct:octnic_data_pkt
112 static inline int octnet_iq_is_full(struct octeon_device *oct, u32 q_no) argument
114 return ((u32)atomic_read(&oct->instr_queue[q_no]->instr_pending)
115 >= (oct->instr_queue[q_no]->max_count - 2));
238 * @param q_no - which queue for back pressure
H A Dcn66xx_regs.h473 #define CN6XXX_DPI_DMA_ENG_ENB(q_no) \
474 (CN6XXX_DPI_DMA_ENG0_ENB + ((q_no) * 8))
478 #define CN6XXX_DPI_DMA_ENG_BUF(q_no) \
479 (CN6XXX_DPI_DMA_ENG0_BUF + ((q_no) * 8))
H A Dlio_ethtool.c483 nctrl.iq_no = lio->linfo.txpciq[0].s.q_no;
718 nctrl.iq_no = lio->linfo.txpciq[0].s.q_no;
744 nctrl.iq_no = lio->linfo.txpciq[0].s.q_no;
787 sc->iq_no = lio->linfo.txpciq[0].s.q_no;
1074 lio->txq = lio->linfo.txpciq[0].s.q_no;
1075 lio->rxq = lio->linfo.rxpciq[0].s.q_no;
1397 nctrl.iq_no = lio->linfo.txpciq[0].s.q_no;
1762 j = lio->linfo.txpciq[vj].s.q_no;
1804 j = lio->linfo.rxpciq[vj].s.q_no;
2021 sc->iq_no = lio->linfo.txpciq[0].s.q_no;
2252 int q_no; local
2274 int q_no; local
2329 int q_no; local
2351 int q_no; local
2395 int q_no; local
2432 u32 j, q_no; local
[all...]
H A Dlio_main.c161 int q_no; local
167 for (q_no = 0; q_no < MAX_OCTEON_OUTPUT_QUEUES(oct); q_no++) {
168 if (!(oct->io_qmask.oq & BIT_ULL(q_no)))
170 reschedule |= octeon_droq_process_packets(oct, oct->droq[q_no],
172 lio_enable_irq(oct->droq[q_no], NULL);
178 int adjusted_q_no = q_no + oct->sriov_info.pf_srn;
471 lio->oct_dev->num_iqs].s.q_no;
636 sc->iq_no = lio->linfo.txpciq[0].s.q_no;
[all...]
/linux-master/drivers/net/ethernet/marvell/octeon_ep/
H A Doctep_tx.c91 if (unlikely(__netif_subqueue_stopped(iq->netdev, iq->q_no)) &&
94 netif_wake_subqueue(iq->netdev, iq->q_no);
146 netdev_tx_reset_queue(netdev_get_tx_queue(iq->netdev, iq->q_no));
171 * @q_no: Tx queue number to be setup.
175 static int octep_setup_iq(struct octep_device *oct, int q_no) argument
184 oct->iq[q_no] = iq;
189 iq->q_no = q_no;
193 iq->netdev_q = netdev_get_tx_queue(iq->netdev, q_no);
201 "Failed to allocate DMA memory for IQ-%d\n", q_no);
266 int q_no = iq->q_no; local
[all...]
H A Doctep_rx.c50 oq->q_no);
99 oq->q_no);
119 * @q_no: Rx queue number to be setup.
123 static int octep_setup_oq(struct octep_device *oct, int q_no) argument
131 oct->oq[q_no] = oq;
136 oq->q_no = q_no;
157 "Failed to allocate DMA memory for OQ-%d !!\n", q_no);
164 "Failed to allocate buffer info for OQ-%d\n", q_no);
172 oct->hw_ops.setup_oq_regs(oct, q_no);
228 int q_no = oq->q_no; local
[all...]
H A Doctep_cnxk_pf.c127 static int cnxk_reset_iq(struct octep_device *oct, int q_no) argument
132 dev_dbg(&oct->pdev->dev, "Reset PF IQ-%d\n", q_no);
135 q_no += conf->pf_ring_cfg.srn;
138 octep_write_csr64(oct, CNXK_SDP_R_IN_ENABLE(q_no), val);
141 octep_write_csr64(oct, CNXK_SDP_R_IN_CNTS(q_no), val);
142 octep_write_csr64(oct, CNXK_SDP_R_IN_INT_LEVELS(q_no), val);
143 octep_write_csr64(oct, CNXK_SDP_R_IN_PKT_CNT(q_no), val);
144 octep_write_csr64(oct, CNXK_SDP_R_IN_BYTE_CNT(q_no), val);
145 octep_write_csr64(oct, CNXK_SDP_R_IN_INSTR_BADDR(q_no), val);
146 octep_write_csr64(oct, CNXK_SDP_R_IN_INSTR_RSIZE(q_no), va
155 cnxk_reset_oq(struct octep_device *oct, int q_no) argument
391 octep_setup_mbox_regs_cnxk_pf(struct octep_device *oct, int q_no) argument
[all...]
H A Doctep_cn9k_pf.c107 static int cn93_reset_iq(struct octep_device *oct, int q_no) argument
112 dev_dbg(&oct->pdev->dev, "Reset PF IQ-%d\n", q_no);
115 q_no += conf->pf_ring_cfg.srn;
118 octep_write_csr64(oct, CN93_SDP_R_IN_ENABLE(q_no), val);
121 octep_write_csr64(oct, CN93_SDP_R_IN_CNTS(q_no), val);
122 octep_write_csr64(oct, CN93_SDP_R_IN_INT_LEVELS(q_no), val);
123 octep_write_csr64(oct, CN93_SDP_R_IN_PKT_CNT(q_no), val);
124 octep_write_csr64(oct, CN93_SDP_R_IN_BYTE_CNT(q_no), val);
125 octep_write_csr64(oct, CN93_SDP_R_IN_INSTR_BADDR(q_no), val);
126 octep_write_csr64(oct, CN93_SDP_R_IN_INSTR_RSIZE(q_no), va
135 cn93_reset_oq(struct octep_device *oct, int q_no) argument
361 octep_setup_mbox_regs_cn93_pf(struct octep_device *oct, int q_no) argument
[all...]
H A Doctep_rx.h165 u32 q_no; member in struct:octep_oq
H A Doctep_tx.h155 u32 q_no; member in struct:octep_iq
/linux-master/drivers/net/ethernet/marvell/octeon_ep_vf/
H A Doctep_vf_tx.c90 netif_subqueue_completed_wake(iq->netdev, iq->q_no, compl_pkts,
145 netdev_tx_reset_queue(netdev_get_tx_queue(iq->netdev, iq->q_no));
170 * @q_no: Tx queue number to be setup.
174 static int octep_vf_setup_iq(struct octep_vf_device *oct, int q_no) argument
183 oct->iq[q_no] = iq;
188 iq->q_no = q_no;
192 iq->netdev_q = netdev_get_tx_queue(iq->netdev, q_no);
200 "Failed to allocate DMA memory for IQ-%d\n", q_no);
212 q_no);
265 int q_no = iq->q_no; local
[all...]
H A Doctep_vf_cn9k.c81 static void cn93_vf_reset_iq(struct octep_vf_device *oct, int q_no) argument
85 dev_dbg(&oct->pdev->dev, "Reset VF IQ-%d\n", q_no);
88 octep_vf_write_csr64(oct, CN93_VF_SDP_R_IN_ENABLE(q_no), val);
91 octep_vf_write_csr64(oct, CN93_VF_SDP_R_IN_INT_LEVELS(q_no), val);
92 octep_vf_write_csr64(oct, CN93_VF_SDP_R_IN_PKT_CNT(q_no), val);
93 octep_vf_write_csr64(oct, CN93_VF_SDP_R_IN_BYTE_CNT(q_no), val);
94 octep_vf_write_csr64(oct, CN93_VF_SDP_R_IN_INSTR_BADDR(q_no), val);
95 octep_vf_write_csr64(oct, CN93_VF_SDP_R_IN_INSTR_RSIZE(q_no), val);
98 octep_vf_write_csr64(oct, CN93_VF_SDP_R_IN_INSTR_DBELL(q_no), val);
100 val = octep_vf_read_csr64(oct, CN93_VF_SDP_R_IN_CNTS(q_no));
106 cn93_vf_reset_oq(struct octep_vf_device *oct, int q_no) argument
245 octep_vf_setup_mbox_regs_cn93(struct octep_vf_device *oct, int q_no) argument
[all...]
H A Doctep_vf_cnxk.c84 static void cnxk_vf_reset_iq(struct octep_vf_device *oct, int q_no) argument
88 dev_dbg(&oct->pdev->dev, "Reset VF IQ-%d\n", q_no);
91 octep_vf_write_csr64(oct, CNXK_VF_SDP_R_IN_ENABLE(q_no), val);
94 octep_vf_write_csr64(oct, CNXK_VF_SDP_R_IN_INT_LEVELS(q_no), val);
95 octep_vf_write_csr64(oct, CNXK_VF_SDP_R_IN_PKT_CNT(q_no), val);
96 octep_vf_write_csr64(oct, CNXK_VF_SDP_R_IN_BYTE_CNT(q_no), val);
97 octep_vf_write_csr64(oct, CNXK_VF_SDP_R_IN_INSTR_BADDR(q_no), val);
98 octep_vf_write_csr64(oct, CNXK_VF_SDP_R_IN_INSTR_RSIZE(q_no), val);
101 octep_vf_write_csr64(oct, CNXK_VF_SDP_R_IN_INSTR_DBELL(q_no), val);
103 val = octep_vf_read_csr64(oct, CNXK_VF_SDP_R_IN_CNTS(q_no));
108 cnxk_vf_reset_oq(struct octep_vf_device *oct, int q_no) argument
256 octep_vf_setup_mbox_regs_cnxk(struct octep_vf_device *oct, int q_no) argument
[all...]
H A Doctep_vf_rx.c50 oq->q_no);
99 oq->q_no);
119 * @q_no: Rx queue number to be setup.
123 static int octep_vf_setup_oq(struct octep_vf_device *oct, int q_no) argument
131 oct->oq[q_no] = oq;
136 oq->q_no = q_no;
157 "Failed to allocate DMA memory for OQ-%d !!\n", q_no);
165 "Failed to allocate buffer info for OQ-%d\n", q_no);
173 oct->hw_ops.setup_oq_regs(oct, q_no);
229 int q_no = oq->q_no; local
[all...]
H A Doctep_vf_rx.h165 u32 q_no; member in struct:octep_vf_oq
H A Doctep_vf_main.c300 netdev_dbg(iq->netdev, "enabling intr for Q-%u\n", iq->q_no);
565 ret = netif_subqueue_maybe_stop(iq->netdev, iq->q_no, IQ_INSTR_SPACE(iq),
609 u16 q_no, wi; local
614 q_no = skb_get_queue_mapping(skb);
615 if (q_no >= oct->num_iqs) {
616 netdev_err(netdev, "Invalid Tx skb->queue_mapping=%d\n", q_no);
617 q_no = q_no % oct->num_iqs;
620 iq = oct->iq[q_no];
H A Doctep_vf_tx.h113 u32 q_no; member in struct:octep_vf_iq

Completed in 345 milliseconds

12