Searched refs:push (Results 1 - 25 of 346) sorted by relevance

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/linux-master/include/linux/
H A Dhidden.h19 #pragma GCC visibility push(hidden)
/linux-master/tools/testing/selftests/x86/
H A Dthunks_32.S22 push %ecx
23 push %edx
24 push %esi
25 push %edi
35 push $0x23 /* USER32_CS */
36 .code32; push $1f; .code64 /* hack: can't have X86_64_32S relocation in 32-bit ELF */
/linux-master/drivers/gpu/drm/nouveau/dispnv50/
H A Ddac907d.c32 struct nvif_push *push = core->chan.push; local
35 if ((ret = PUSH_WAIT(push, 2)))
38 PUSH_MTHD(push, NV907D, DAC_SET_CONTROL(or), ctrl);
H A Dsorc37d.c32 struct nvif_push *push = core->chan.push; local
35 if ((ret = PUSH_WAIT(push, 2)))
38 PUSH_MTHD(push, NVC37D, SOR_SET_CONTROL(or), ctrl);
H A Dwndwc37e.c42 struct nvif_push *push = wndw->wndw.push; local
45 if ((ret = PUSH_WAIT(push, 13)))
48 PUSH_MTHD(push, NVC37E, SET_CSC_RED2RED, asyw->csc.matrix, 12);
55 struct nvif_push *push = wndw->wndw.push; local
58 if ((ret = PUSH_WAIT(push, 2)))
61 PUSH_MTHD(push, NVC37E, SET_CONTEXT_DMA_INPUT_LUT, 0x00000000);
68 struct nvif_push *push = wndw->wndw.push; local
97 struct nvif_push *push = wndw->wndw.push; local
142 struct nvif_push *push = wndw->wndw.push; local
159 struct nvif_push *push = wndw->wndw.push; local
212 struct nvif_push *push = wndw->wndw.push; local
225 struct nvif_push *push = wndw->wndw.push; local
242 struct nvif_push *push = wndw->wndw.push; local
255 struct nvif_push *push = wndw->wndw.push; local
271 struct nvif_push *push = wndw->wndw.push; local
[all...]
H A Dcore507d.c36 struct nvif_push *push = core->chan.push; local
39 if ((ret = PUSH_WAIT(push, (ntfy ? 2 : 0) + 3)))
43 PUSH_MTHD(push, NV507D, SET_NOTIFIER_CONTROL,
49 PUSH_MTHD(push, NV507D, UPDATE, interlock[NV50_DISP_INTERLOCK_BASE] |
58 return PUSH_KICK(push);
83 struct nvif_push *push = disp->core->chan.push; local
86 ret = PUSH_WAIT(push, 6);
90 PUSH_MTHD(push, NV507
133 struct nvif_push *push = core->chan.push; local
[all...]
H A Dcrcc57d.c16 struct nvif_push *push = nv50_disp(head->base.base.dev)->core->chan.push; local
35 ret = PUSH_WAIT(push, 4);
40 PUSH_MTHD(push, NVC57D, HEAD_SET_CONTEXT_DMA_CRC(i), ctx->ntfy.handle);
41 PUSH_MTHD(push, NVC57D, HEAD_SET_CRC_CONTROL(i), crc_args);
43 PUSH_MTHD(push, NVC57D, HEAD_SET_CRC_CONTROL(i), 0);
44 PUSH_MTHD(push, NVC57D, HEAD_SET_CONTEXT_DMA_CRC(i), 0);
H A Dcorec57d.c32 struct nvif_push *push = core->chan.push; local
36 if ((ret = PUSH_WAIT(push, 2 + windows * 5)))
39 PUSH_MTHD(push, NVC57D, SET_CONTEXT_DMA_NOTIFIER, core->chan.sync.handle);
42 PUSH_MTHD(push, NVC57D, WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS(i),
50 PUSH_MTHD(push, NVC57D, WINDOW_SET_WINDOW_USAGE_BOUNDS(i),
58 return PUSH_KICK(push);
H A Dwimmc37b.c34 struct nvif_push *push = wndw->wimm.push; local
37 if ((ret = PUSH_WAIT(push, 2)))
40 PUSH_MTHD(push, NVC37B, UPDATE, 0x00000001 |
43 return PUSH_KICK(push);
49 struct nvif_push *push = wndw->wimm.push; local
52 if ((ret = PUSH_WAIT(push, 2)))
55 PUSH_MTHD(push, NVC37B, SET_POINT_OUT(0),
H A Dhead827d.c32 struct nvif_push *push = nv50_disp(head->base.base.dev)->core->chan.push; local
36 if ((ret = PUSH_WAIT(push, 4)))
39 PUSH_MTHD(push, NV827D, HEAD_SET_CONTROL_CURSOR(i),
44 PUSH_MTHD(push, NV827D, HEAD_SET_CONTEXT_DMA_CURSOR(i), 0x00000000);
51 struct nvif_push *push = nv50_disp(head->base.base.dev)->core->chan.push; local
55 if ((ret = PUSH_WAIT(push, 5)))
58 PUSH_MTHD(push, NV827D, HEAD_SET_CONTROL_CURSOR(i),
69 PUSH_MTHD(push, NV827
76 struct nvif_push *push = nv50_disp(head->base.base.dev)->core->chan.push; local
113 struct nvif_push *push = nv50_disp(head->base.base.dev)->core->chan.push; local
130 struct nvif_push *push = nv50_disp(head->base.base.dev)->core->chan.push; local
[all...]
H A Dwndwc57e.c35 struct nvif_push *push = wndw->wndw.push; local
38 if ((ret = PUSH_WAIT(push, 17)))
41 PUSH_MTHD(push, NVC57E, SET_PRESENT_CONTROL,
46 PUSH_MTHD(push, NVC57E, SET_SIZE,
64 PUSH_MTHD(push, NVC57E, SET_CONTEXT_DMA_ISO(0), asyw->image.handle, 1);
65 PUSH_MTHD(push, NVC57E, SET_OFFSET(0), asyw->image.offset[0] >> 8);
67 PUSH_MTHD(push, NVC57E, SET_POINT_IN(0),
71 PUSH_MTHD(push, NVC57E, SET_SIZE_IN,
75 PUSH_MTHD(push, NVC57
84 struct nvif_push *push = wndw->wndw.push; local
102 struct nvif_push *push = wndw->wndw.push; local
115 struct nvif_push *push = wndw->wndw.push; local
128 struct nvif_push *push = wndw->wndw.push; local
[all...]
/linux-master/tools/testing/selftests/kvm/lib/x86_64/
H A Dhandlers.S2 push %r15
3 push %r14
4 push %r13
5 push %r12
6 push %r11
7 push %r10
8 push %r9
9 push %r8
11 push %rdi
12 push
[all...]
/linux-master/tools/testing/selftests/sgx/
H A Dcall.S11 push %r15
14 push %r14
17 push %r13
20 push %r12
23 push %rbx
26 push $0
28 push 0x38(%rsp)
/linux-master/arch/x86/platform/efi/
H A Defi_stub_32.S16 push %ebp
18 push %ebx
20 push 16(%esp)
21 push 16(%esp)
22 push %ecx
23 push %edx
/linux-master/drivers/gpu/drm/nouveau/
H A Dnouveau_bo0039.c50 struct nvif_push *push = chan->chan.push; local
58 ret = PUSH_WAIT(push, 3);
62 PUSH_MTHD(push, NV039, SET_CONTEXT_DMA_BUFFER_IN, src_ctxdma,
69 ret = PUSH_WAIT(push, 11);
73 PUSH_MTHD(push, NV039, OFFSET_IN, src_offset,
86 PUSH_MTHD(push, NV039, NO_OPERATION, 0x00000000);
99 struct nvif_push *push = chan->chan.push; local
102 ret = PUSH_WAIT(push,
[all...]
H A Dnouveau_bo74c1.c40 struct nvif_push *push = chan->chan.push; local
43 ret = PUSH_WAIT(push, 7);
47 PUSH_NVSQ(push, NV74C1, 0x0304, new_reg->size,
H A Dnvc0_fence.c37 struct nvif_push *push = chan->chan.push; local
38 int ret = PUSH_WAIT(push, 6);
40 PUSH_MTHD(push, NV906F, SEMAPHOREA,
52 PUSH_KICK(push);
60 struct nvif_push *push = chan->chan.push; local
61 int ret = PUSH_WAIT(push, 5);
63 PUSH_MTHD(push, NV906F, SEMAPHOREA,
72 PUSH_KICK(push);
[all...]
H A Dnouveau_bo9039.c41 struct nvif_push *push = chan->chan.push; local
52 ret = PUSH_WAIT(push, 12);
56 PUSH_MTHD(push, NV9039, OFFSET_OUT_UPPER,
61 PUSH_MTHD(push, NV9039, OFFSET_IN_UPPER,
70 PUSH_MTHD(push, NV9039, LAUNCH_DMA,
89 struct nvif_push *push = chan->chan.push; local
92 ret = PUSH_WAIT(push, 2);
96 PUSH_MTHD(push, NV903
[all...]
H A Dnouveau_boa0b5.c42 struct nvif_push *push = chan->chan.push; local
45 ret = PUSH_WAIT(push, 10);
49 PUSH_MTHD(push, NVA0B5, OFFSET_IN_UPPER,
63 PUSH_IMMD(push, NVA0B5, LAUNCH_DMA,
81 struct nvif_push *push = chan->chan.push; local
84 ret = PUSH_WAIT(push, 2);
88 PUSH_NVSQ(push, NVA0B5, 0x0000, handle & 0x0000ffff);
/linux-master/arch/x86/entry/
H A Dentry_64_fred.S61 push %rbp
79 * Start to push a FRED stack frame, which is always 64 bytes:
94 push $0 /* Reserved, must be 0 */
95 push $0 /* Event data, 0 for IRQ/NMI */
96 push %rdi /* fred_ss handed in by the caller */
97 push %rbp
100 push %rax
105 * used here to push the return RIP, otherwise there is no chance to
106 * push an error code before invoking the IRQ/NMI handler.
108 * Use LEA to get the return RIP and push i
[all...]
/linux-master/tools/testing/memblock/linux/
H A Dprintk.h14 #pragma GCC diagnostic push
17 #pragma GCC diagnostic push
/linux-master/arch/sh/drivers/
H A DMakefile9 obj-$(CONFIG_PUSH_SWITCH) += push-switch.o
/linux-master/drivers/gpu/drm/vmwgfx/device_include/
H A Dsvga3d_cmd.h335 #pragma pack(push, 1)
342 #pragma pack(push, 1)
348 #pragma pack(push, 1)
359 #pragma pack(push, 1)
372 #pragma pack(push, 1)
378 #pragma pack(push, 1)
384 #pragma pack(push, 1)
390 #pragma pack(push, 1)
401 #pragma pack(push, 1)
420 #pragma pack(push,
[all...]
H A Dsvga3d_dx.h132 #pragma pack(push, 1)
139 #pragma pack(push, 1)
145 #pragma pack(push, 1)
151 #pragma pack(push, 1)
159 #pragma pack(push, 1)
165 #pragma pack(push, 1)
171 #pragma pack(push, 1)
181 #pragma pack(push, 1)
189 #pragma pack(push, 1)
207 #pragma pack(push,
[all...]
/linux-master/arch/arc/include/asm/
H A Dentry-compact.h49 push r9
58 push r0
59 push r1
60 push r2
61 push r3
62 push r4
63 push r5
64 push r6
65 push r7
66 push r
[all...]

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