/linux-master/drivers/net/ethernet/mediatek/ |
H A D | mtk_ppe.c | 26 static void ppe_w32(struct mtk_ppe *ppe, u32 reg, u32 val) argument 28 writel(val, ppe->base + reg); 31 static u32 ppe_r32(struct mtk_ppe *ppe, u32 reg) argument 33 return readl(ppe->base + reg); 36 static u32 ppe_m32(struct mtk_ppe *ppe, u32 reg, u32 mask, u32 set) argument 40 val = ppe_r32(ppe, reg); 43 ppe_w32(ppe, reg, val); 48 static u32 ppe_set(struct mtk_ppe *ppe, u32 reg, u32 val) argument 50 return ppe_m32(ppe, reg, 0, val); 53 static u32 ppe_clear(struct mtk_ppe *ppe, u3 argument 63 mtk_ppe_wait_busy(struct mtk_ppe *ppe) argument 78 mtk_ppe_mib_wait_busy(struct mtk_ppe *ppe) argument 93 mtk_mib_entry_read(struct mtk_ppe *ppe, u16 index, u64 *bytes, u64 *packets) argument 127 mtk_ppe_cache_clear(struct mtk_ppe *ppe) argument 133 mtk_ppe_cache_enable(struct mtk_ppe *ppe, bool enable) argument 501 __mtk_foe_entry_clear(struct mtk_ppe *ppe, struct mtk_flow_entry *entry) argument 542 __mtk_foe_entry_idle_time(struct mtk_ppe *ppe, u32 ib1) argument 555 mtk_flow_entry_update_l2(struct mtk_ppe *ppe, struct mtk_flow_entry *entry) argument 588 mtk_flow_entry_update(struct mtk_ppe *ppe, struct mtk_flow_entry *entry) argument 617 __mtk_foe_entry_commit(struct mtk_ppe *ppe, struct mtk_foe_entry *entry, u16 hash) argument 653 mtk_foe_entry_clear(struct mtk_ppe *ppe, struct mtk_flow_entry *entry) argument 661 mtk_foe_entry_commit_l2(struct mtk_ppe *ppe, struct mtk_flow_entry *entry) argument 679 mtk_foe_entry_commit(struct mtk_ppe *ppe, struct mtk_flow_entry *entry) argument 698 mtk_foe_entry_commit_subflow(struct mtk_ppe *ppe, struct mtk_flow_entry *entry, u16 hash) argument 738 __mtk_ppe_check_skb(struct mtk_ppe *ppe, struct sk_buff *skb, u16 hash) argument 817 mtk_foe_entry_idle_time(struct mtk_ppe *ppe, struct mtk_flow_entry *entry) argument 824 mtk_ppe_prepare_reset(struct mtk_ppe *ppe) argument 851 mtk_foe_entry_get_mib(struct mtk_ppe *ppe, u32 index, struct mtk_foe_accounting *diff) argument 884 struct mtk_ppe *ppe; local 954 mtk_ppe_init_foe_table(struct mtk_ppe *ppe) argument 976 mtk_ppe_start(struct mtk_ppe *ppe) argument 1076 mtk_ppe_stop(struct mtk_ppe *ppe) argument [all...] |
H A D | mtk_ppe.h | 349 void mtk_ppe_start(struct mtk_ppe *ppe); 350 int mtk_ppe_stop(struct mtk_ppe *ppe); 351 int mtk_ppe_prepare_reset(struct mtk_ppe *ppe); 353 void __mtk_ppe_check_skb(struct mtk_ppe *ppe, struct sk_buff *skb, u16 hash); 356 mtk_ppe_check_skb(struct mtk_ppe *ppe, struct sk_buff *skb, u16 hash) argument 360 if (!ppe) 367 diff = now - ppe->foe_check_time[hash]; 371 ppe->foe_check_time[hash] = now; 372 __mtk_ppe_check_skb(ppe, skb, hash); 399 int mtk_foe_entry_commit(struct mtk_ppe *ppe, struc [all...] |
H A D | mtk_ppe_debugfs.c | 78 struct mtk_ppe *ppe = m->private; local 82 struct mtk_foe_entry *entry = mtk_foe_get_entry(ppe, i); 99 acct = mtk_foe_entry_get_mib(ppe, i, NULL); 101 type = mtk_get_ib1_pkt_type(ppe->eth, entry->ib1); 183 int mtk_ppe_debugfs_init(struct mtk_ppe *ppe, int index) argument 187 snprintf(ppe->dirname, sizeof(ppe->dirname), "ppe%d", index); 189 root = debugfs_create_dir(ppe->dirname, NULL); 190 debugfs_create_file("entries", S_IRUGO, root, ppe, [all...] |
H A D | mtk_ppe_offload.c | 464 err = mtk_foe_entry_commit(eth->ppe[entry->ppe_index], entry); 476 mtk_foe_entry_clear(eth->ppe[entry->ppe_index], entry); 494 mtk_foe_entry_clear(eth->ppe[entry->ppe_index], entry); 516 idle = mtk_foe_entry_idle_time(eth->ppe[entry->ppe_index], entry); 520 mtk_foe_entry_get_mib(eth->ppe[entry->ppe_index], entry->hash,
|
H A D | mtk_eth_soc.h | 1289 struct mtk_ppe *ppe[2]; member in struct:mtk_eth 1345 mtk_foe_get_entry(struct mtk_ppe *ppe, u16 hash) argument 1347 const struct mtk_soc_data *soc = ppe->eth->soc; 1349 return ppe->foe_table + hash * soc->foe_entry_size;
|
H A D | mtk_eth_soc.c | 2178 mtk_ppe_check_skb(eth->ppe[0], skb, hash); 3380 for (i = 0; i < ARRAY_SIZE(eth->ppe); i++) 3381 mtk_ppe_start(eth->ppe[i]); 3487 for (i = 0; i < ARRAY_SIZE(eth->ppe); i++) 3488 mtk_ppe_stop(eth->ppe[i]); 4097 for (i = 0; i < ARRAY_SIZE(eth->ppe); i++) 4098 mtk_ppe_prepare_reset(eth->ppe[i]); 4952 num_ppe = min_t(u32, ARRAY_SIZE(eth->ppe), num_ppe); 4956 eth->ppe[i] = mtk_ppe_init(eth, eth->base + ppe_addr, i); 4958 if (!eth->ppe[ [all...] |
H A D | mtk_wed.c | 1975 mtk_ppe_check_skb(eth->ppe[dev->hw->index], skb, hash);
|
/linux-master/block/partitions/ |
H A D | aix.c | 50 struct ppe { struct 64 struct ppe ppe[1016]; member in struct:pvd 232 struct ppe *p = pvd->ppe + i;
|
/linux-master/arch/mips/lantiq/ |
H A D | clk.h | 73 unsigned long io, unsigned long ppe);
|
H A D | clk.c | 30 unsigned long io, unsigned long ppe) 35 cpu_clk_generic[3].rate = ppe; 29 clkdev_add_static(unsigned long cpu, unsigned long fpi, unsigned long io, unsigned long ppe) argument
|
/linux-master/arch/powerpc/platforms/cell/ |
H A D | cbe_thermal.c | 272 static DEVICE_PREFIX_ATTR(ppe, throttle_end, 0600); 273 static DEVICE_PREFIX_ATTR(ppe, throttle_begin, 0600); 274 static DEVICE_PREFIX_ATTR(ppe, throttle_full_stop, 0600); 305 /* ppe 309 tpr.ppe = 0x1F0803;
|
/linux-master/drivers/media/platform/nvidia/tegra-vde/ |
H A D | vde.h | 99 void __iomem *ppe; member in struct:tegra_vde 218 if (vde->ppe == base)
|
H A D | vde.c | 251 vde->ppe = devm_platform_ioremap_resource_byname(pdev, "ppe"); 252 if (IS_ERR(vde->ppe)) 253 return PTR_ERR(vde->ppe);
|
H A D | h264.c | 286 tegra_vde_set_bits(vde, 0x000A, vde->ppe, 0x14); 287 tegra_vde_set_bits(vde, 0x000A, vde->ppe, 0x28);
|
/linux-master/arch/powerpc/include/asm/ |
H A D | cell-regs.h | 49 u32 ppe; member in struct:ppe_spe_reg::__anon662
|
/linux-master/include/linux/mtd/ |
H A D | nand.h | 41 #define NAND_MEMORG(bpc, ps, os, ppe, epl, mbb, ppl, lpt, nt) \ 46 .pages_per_eraseblock = (ppe), \
|
/linux-master/drivers/net/wireless/intel/iwlwifi/mvm/ |
H A D | mac80211.c | 2010 static u8 iwl_mvm_he_get_ppe_val(u8 *ppe, u8 ppe_pos_bit) argument 2018 return (ppe[byte_num] >> bit_num) & 2029 res = (ppe[byte_num + 1] & 2032 res += (ppe[byte_num] >> bit_num) & (BIT(residue_bits) - 1); 2039 u8 ru_index_bitmap, u8 *ppe, u8 ppe_pos_bit, 2079 high_th = iwl_mvm_he_get_ppe_val(ppe, ppe_pos_bit); 2081 low_th = iwl_mvm_he_get_ppe_val(ppe, ppe_pos_bit); 2098 u8 *ppe = &link_sta->he_cap.ppe_thres[0]; local 2100 u8_get_bits(*ppe, 2105 iwl_mvm_parse_ppe(mvm, pkt_ext, nss, ru_index_bitmap, ppe, ppe_pos_bi 2037 iwl_mvm_parse_ppe(struct iwl_mvm *mvm, struct iwl_he_pkt_ext_v2 *pkt_ext, u8 nss, u8 ru_index_bitmap, u8 *ppe, u8 ppe_pos_bit, bool inheritance) argument 2206 u8 *ppe = &link_sta->eht_cap.eht_ppe_thres[0]; local [all...] |
/linux-master/drivers/gpu/drm/amd/display/dc/dml/dcn21/ |
H A D | display_rq_dlg_calc_21.c | 705 unsigned int ppe = mode_422 ? 2 : 1; local 707 // FIXME check if ppe apply for both luma and chroma in 422 case 709 vp_width = pipe_param->src.viewport_width_c / ppe; 714 vp_width = pipe_param->src.viewport_width / ppe;
|
/linux-master/drivers/gpu/drm/amd/display/dc/dml/dcn20/ |
H A D | display_rq_dlg_calc_20v2.c | 696 unsigned int ppe = mode_422 ? 2 : 1; local 698 // TODO check if ppe apply for both luma and chroma in 422 case 700 vp_width = pipe_src_param->viewport_width_c / ppe; 705 vp_width = pipe_src_param->viewport_width / ppe;
|
H A D | display_rq_dlg_calc_20.c | 696 unsigned int ppe = mode_422 ? 2 : 1; local 698 // TODO check if ppe apply for both luma and chroma in 422 case 700 vp_width = pipe_src_param->viewport_width_c / ppe; 705 vp_width = pipe_src_param->viewport_width / ppe;
|
/linux-master/drivers/gpu/drm/amd/display/dc/dml/ |
H A D | dml1_display_rq_dlg_calc.c | 567 unsigned int ppe = mode_422 ? 2 : 1; local 623 /* TODO check if ppe apply for both luma and chroma in 422 case */ 625 vp_width = pipe_src_param->viewport_width_c / ppe; 630 vp_width = pipe_src_param->viewport_width / ppe;
|
/linux-master/drivers/gpu/drm/amd/display/dc/dml/dcn31/ |
H A D | display_rq_dlg_calc_31.c | 664 unsigned int ppe = mode_422 ? 2 : 1; local 666 // FIXME check if ppe apply for both luma and chroma in 422 case 668 vp_width = pipe_param->src.viewport_width_c / ppe; 674 vp_width = pipe_param->src.viewport_width / ppe;
|
/linux-master/drivers/gpu/drm/amd/display/dc/dml/dcn30/ |
H A D | display_rq_dlg_calc_30.c | 669 unsigned int ppe = mode_422 ? 2 : 1; local 671 // FIXME check if ppe apply for both luma and chroma in 422 case 673 vp_width = pipe_param->src.viewport_width_c / ppe; 679 vp_width = pipe_param->src.viewport_width / ppe;
|
/linux-master/drivers/gpu/drm/amd/display/dc/dml/dcn314/ |
H A D | display_rq_dlg_calc_314.c | 752 unsigned int ppe = mode_422 ? 2 : 1; local 754 // FIXME check if ppe apply for both luma and chroma in 422 case 756 vp_width = pipe_param->src.viewport_width_c / ppe; 762 vp_width = pipe_param->src.viewport_width / ppe;
|
/linux-master/drivers/net/wireless/realtek/rtw89/ |
H A D | fw.c | 2561 u16 ppe; local 2592 ppe = le16_to_cpu(*((__le16 *)&sta->deflink.he_cap.ppe_thres[idx])); 2593 ppe16 = (ppe >> sh) & IEEE80211_PPE_THRES_NSS_MASK; 2595 ppe8 = (ppe >> sh) & IEEE80211_PPE_THRES_NSS_MASK; 2695 u16 ppe; local 2729 ppe = get_unaligned_le16(sta->deflink.eht_cap.eht_ppe_thres + idx); 2730 ppe16 = (ppe >> sh) & IEEE80211_PPE_THRES_NSS_MASK; 2732 ppe8 = (ppe >> sh) & IEEE80211_PPE_THRES_NSS_MASK;
|