Searched refs:plld (Results 1 - 3 of 3) sorted by relevance

/linux-master/arch/powerpc/boot/
H A D4xx.c403 u32 plld = CPR0_READ(DCRN_CPR0_PLLD); local
406 u32 fbdv = __fix_zero((plld >> 24) & 0x1f, 32);
407 u32 fwdva = __fix_zero((plld >> 16) & 0xf, 16);
408 u32 fwdvb = __fix_zero((plld >> 8) & 7, 8);
409 u32 lfbdv = __fix_zero(plld & 0x3f, 64);
727 u32 plld = CPR0_READ(DCRN_CPR0_PLLD); local
734 u32 fbdv = ibm405ex_get_fbdv(__fix_zero((plld >> 24) & 0xff, 1));
736 u32 fwdva = ibm405ex_get_fwdva(__fix_zero((plld >> 16) & 0x0f, 1));
/linux-master/drivers/gpu/drm/tegra/
H A Ddsi.c970 unsigned long plld; local
999 plld = DIV_ROUND_UP(state->bclk * 8, USEC_PER_SEC) * USEC_PER_SEC;
1000 state->period = DIV_ROUND_CLOSEST(NSEC_PER_SEC, plld);
1017 plld /= 2;
1032 plld, scdiv);
/linux-master/drivers/clk/tegra/
H A Dclk-tegra210.c883 static void tegra210_plld_set_defaults(struct tegra_clk_pll *plld) argument
888 plld->params->defaults_set = true;
890 if (readl_relaxed(clk_base + plld->params->base_reg) &
898 _pll_misc_chk_default(clk_base, plld->params, 1,
905 _pll_misc_chk_default(clk_base, plld->params, 0, val,
908 if (!plld->params->defaults_set)
913 val = readl_relaxed(clk_base + plld->params->ext_misc_reg[0]);
916 writel_relaxed(val, clk_base + plld->params->ext_misc_reg[0]);
922 val = readl_relaxed(clk_base + plld->params->ext_misc_reg[0]);
926 writel_relaxed(val, clk_base + plld
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