Searched refs:pll3 (Results 1 - 6 of 6) sorted by last modified time
/linux-master/drivers/gpu/drm/i915/display/ |
H A D | intel_dpll_mgr.c | 2038 PORT_PLL_M2_FRAC_ENABLE, pll->state.hw_state.pll3); 2152 hw_state->pll3 = intel_de_read(i915, BXT_PORT_PLL(phy, ch, 3)); 2153 hw_state->pll3 &= PORT_PLL_M2_FRAC_ENABLE; 2292 dpll_hw_state->pll3 = PORT_PLL_M2_FRAC_ENABLE; 2320 if (pll_state->pll3 & PORT_PLL_M2_FRAC_ENABLE) 2409 "pll0: 0x%x, pll1: 0x%x, pll2: 0x%x, pll3: 0x%x, " 2416 hw_state->pll3, 2432 a->pll3 == b->pll3 &&
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H A D | intel_dpll_mgr.h | 212 u32 ebb0, ebb4, pll0, pll1, pll2, pll3, pll6, pll8, pll9, pll10, pcsdw12; member in struct:intel_dpll_hw_state
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/linux-master/drivers/gpu/drm/tegra/ |
H A D | sor.c | 370 unsigned int pll3; member in struct:tegra_sor_regs 2291 value = tegra_sor_readl(sor, sor->soc->regs->pll3); 2293 tegra_sor_writel(sor, value, sor->soc->regs->pll3); 2511 value = tegra_sor_readl(sor, sor->soc->regs->pll3); 2520 tegra_sor_writel(sor, value, sor->soc->regs->pll3); 2774 value = tegra_sor_readl(sor, sor->soc->regs->pll3); 2776 tegra_sor_writel(sor, value, sor->soc->regs->pll3); 3287 .pll3 = 0x1a, 3459 .pll3 = 0x1a, 3520 .pll3 [all...] |
/linux-master/drivers/clk/qcom/ |
H A D | gcc-msm8960.c | 29 static struct clk_pll pll3 = { variable in typeref:struct:clk_pll 38 .name = "pll3", 328 { .hw = &pll3.clkr.hw }, 3243 [PLL3] = &pll3.clkr, 3471 [PLL3] = &pll3.clkr,
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H A D | gcc-ipq806x.c | 61 static struct clk_pll pll3 = { variable in typeref:struct:clk_pll 70 .name = "pll3", 324 { .hw = &pll3.clkr.hw }, 385 { .hw = &pll3.clkr.hw }, 3069 [PLL3] = &pll3.clkr,
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/linux-master/drivers/clk/sunxi/ |
H A D | Makefile | 18 obj-$(CONFIG_CLK_SUNXI_CLOCKS) += clk-sun4i-pll3.o
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