Searched refs:phyreg (Results 1 - 9 of 9) sorted by relevance

/linux-master/drivers/net/ethernet/samsung/sxgbe/
H A Dsxgbe_mdio.c53 int devad, int phyreg, u16 phydata)
59 reg |= (phyaddr << 16) | (phyreg & 0xffff);
66 int phyreg, u16 phydata)
73 reg = (phyaddr << 16) | (phyreg & 0x1f);
80 int phyaddr, int phyreg, u16 phydata)
93 sxgbe_mdio_c22(sp, cmd, phyaddr, phyreg, phydata);
99 int phyaddr, int devad, int phyreg,
109 sxgbe_mdio_c45(sp, cmd, phyaddr, devad, phyreg, phydata);
118 * @phyreg: address of register with in phy register
121 static int sxgbe_mdio_read_c22(struct mii_bus *bus, int phyaddr, int phyreg) argument
52 sxgbe_mdio_c45(struct sxgbe_priv_data *sp, u32 cmd, int phyaddr, int devad, int phyreg, u16 phydata) argument
65 sxgbe_mdio_c22(struct sxgbe_priv_data *sp, u32 cmd, int phyaddr, int phyreg, u16 phydata) argument
79 sxgbe_mdio_access_c22(struct sxgbe_priv_data *sp, u32 cmd, int phyaddr, int phyreg, u16 phydata) argument
98 sxgbe_mdio_access_c45(struct sxgbe_priv_data *sp, u32 cmd, int phyaddr, int devad, int phyreg, u16 phydata) argument
143 sxgbe_mdio_read_c45(struct mii_bus *bus, int phyaddr, int devad, int phyreg) argument
166 sxgbe_mdio_write_c22(struct mii_bus *bus, int phyaddr, int phyreg, u16 phydata) argument
185 sxgbe_mdio_write_c45(struct mii_bus *bus, int phyaddr, int devad, int phyreg, u16 phydata) argument
[all...]
/linux-master/drivers/net/ethernet/stmicro/stmmac/
H A Dstmmac_mdio.c49 int devad, int phyreg, u32 *hw_addr)
58 *hw_addr = (phyaddr << MII_XGMAC_PA_SHIFT) | (phyreg & 0xffff);
63 int phyreg, u32 *hw_addr)
78 *hw_addr = (phyaddr << MII_XGMAC_PA_SHIFT) | (phyreg & 0x1f);
132 int phyreg)
145 stmmac_xgmac2_c22_format(priv, phyaddr, phyreg, &addr);
151 int devad, int phyreg)
159 stmmac_xgmac2_c45_format(priv, phyaddr, devad, phyreg, &addr);
210 int phyreg, u16 phydata)
223 stmmac_xgmac2_c22_format(priv, phyaddr, phyreg,
48 stmmac_xgmac2_c45_format(struct stmmac_priv *priv, int phyaddr, int devad, int phyreg, u32 *hw_addr) argument
62 stmmac_xgmac2_c22_format(struct stmmac_priv *priv, int phyaddr, int phyreg, u32 *hw_addr) argument
131 stmmac_xgmac2_mdio_read_c22(struct mii_bus *bus, int phyaddr, int phyreg) argument
150 stmmac_xgmac2_mdio_read_c45(struct mii_bus *bus, int phyaddr, int devad, int phyreg) argument
209 stmmac_xgmac2_mdio_write_c22(struct mii_bus *bus, int phyaddr, int phyreg, u16 phydata) argument
229 stmmac_xgmac2_mdio_write_c45(struct mii_bus *bus, int phyaddr, int devad, int phyreg, u16 phydata) argument
275 stmmac_mdio_read_c22(struct mii_bus *bus, int phyaddr, int phyreg) argument
312 stmmac_mdio_read_c45(struct mii_bus *bus, int phyaddr, int devad, int phyreg) argument
373 stmmac_mdio_write_c22(struct mii_bus *bus, int phyaddr, int phyreg, u16 phydata) argument
412 stmmac_mdio_write_c45(struct mii_bus *bus, int phyaddr, int devad, int phyreg, u16 phydata) argument
[all...]
H A Ddwmac-intel.c62 int phyreg, u32 mask, u32 val)
68 val_rd = mdiobus_read(priv->mii, phyaddr, phyreg);
61 serdes_status_poll(struct stmmac_priv *priv, int phyaddr, int phyreg, u32 mask, u32 val) argument
/linux-master/drivers/net/ethernet/xircom/
H A Dxirc2ps_cs.c258 static unsigned mii_rd(unsigned int ioaddr, u_char phyaddr, u_char phyreg);
259 static void mii_wr(unsigned int ioaddr, u_char phyaddr, u_char phyreg,
420 mii_rd(unsigned int ioaddr, u_char phyaddr, u_char phyreg) argument
430 mii_wbits(ioaddr, phyreg, 5); /* PHY register to read */
442 mii_wr(unsigned int ioaddr, u_char phyaddr, u_char phyreg, unsigned data, argument
452 mii_wbits(ioaddr, phyreg, 5); /* PHY Register to write */
/linux-master/drivers/net/ethernet/nvidia/
H A Dforcedeth.c3307 u32 phyreg, txreg; local
3317 phyreg = readl(base + NvRegSlotTime);
3318 phyreg &= ~(0x3FF00);
3320 phyreg |= NVREG_SLOTTIME_10_100_FULL;
3322 phyreg |= NVREG_SLOTTIME_10_100_FULL;
3324 phyreg |= NVREG_SLOTTIME_1000_FULL;
3325 writel(phyreg, base + NvRegSlotTime);
3328 phyreg = readl(base + NvRegPhyInterface);
3329 phyreg &= ~(PHY_HALF|PHY_100|PHY_1000);
3331 phyreg |
3391 u32 control_1000, status_1000, phyreg, pause_flags, txreg; local
[all...]
/linux-master/drivers/net/ethernet/smsc/
H A Dsmc91x.c809 static int smc_phy_read(struct net_device *dev, int phyaddr, int phyreg) argument
820 /* Start code (01) + read (10) + phyaddr + phyreg */
821 smc_mii_out(dev, 6 << 10 | phyaddr << 5 | phyreg, 14);
829 DBG(3, dev, "%s: phyaddr=0x%x, phyreg=0x%x, phydata=0x%x\n",
830 __func__, phyaddr, phyreg, phydata);
839 static void smc_phy_write(struct net_device *dev, int phyaddr, int phyreg, argument
850 /* Start code (01) + write (01) + phyaddr + phyreg + turnaround + phydata */
851 smc_mii_out(dev, 5 << 28 | phyaddr << 23 | phyreg << 18 | 2 << 16 | phydata, 32);
856 DBG(3, dev, "%s: phyaddr=0x%x, phyreg=0x%x, phydata=0x%x\n",
857 __func__, phyaddr, phyreg, phydat
[all...]
/linux-master/drivers/net/ethernet/nxp/
H A Dlpc_eth.c670 static int lpc_mdio_read(struct mii_bus *bus, int phy_id, int phyreg) argument
676 writel(((phy_id << 8) | phyreg), LPC_ENET_MADR(pldat->net_base));
692 static int lpc_mdio_write(struct mii_bus *bus, int phy_id, int phyreg, argument
698 writel(((phy_id << 8) | phyreg), LPC_ENET_MADR(pldat->net_base));
/linux-master/drivers/net/ethernet/sgi/
H A Dmeth.c120 static unsigned long mdio_read(struct meth_private *priv, unsigned long phyreg) argument
124 mace->eth.phy_regs = (priv->phy_addr << 5) | (phyreg & 0x1f);
/linux-master/drivers/net/ethernet/realtek/
H A Dr8169_main.c5143 static int r8169_mdio_read_reg(struct mii_bus *mii_bus, int phyaddr, int phyreg) argument
5150 return rtl_readphy(tp, phyreg);
5154 int phyreg, u16 val)
5161 rtl_writephy(tp, phyreg, val);
5153 r8169_mdio_write_reg(struct mii_bus *mii_bus, int phyaddr, int phyreg, u16 val) argument

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