/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/avr32/mach-at32ap/ |
H A D | at32ap.c | 55 struct clk *pclk, *hclk; local 57 pclk = clk_get(&pdev->dev, "pclk"); 58 if (IS_ERR(pclk)) { 59 dev_err(&pdev->dev, "no pclk defined\n"); 60 return PTR_ERR(pclk); 65 clk_put(pclk); 69 clk_enable(pclk);
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H A D | hsmc.c | 26 struct clk *pclk; member in struct:hsmc 125 struct clk *pclk, *mck; local 134 pclk = clk_get(&pdev->dev, "pclk"); 135 if (IS_ERR(pclk)) 136 return PTR_ERR(pclk); 148 clk_enable(pclk); 151 hsmc->pclk = pclk; 166 clk_disable(pclk); [all...] |
H A D | time-tc.c | 78 static int avr32_timer_calc_div_and_set_jiffies(struct clk *pclk) argument 93 count_hz = clk_get_rate(pclk) / divs[i]; 121 struct clk *pclk; local 133 pclk = clk_get(&at32_systc0_device.dev, "pclk"); 134 if (IS_ERR(pclk)) { 135 pr_debug("timer: could not get clk: %ld\n", PTR_ERR(pclk)); 138 clk_enable(pclk); 152 ret = avr32_timer_calc_div_and_set_jiffies(pclk); 180 clk_put(pclk); [all...] |
H A D | intc.c | 90 struct clk *pclk; local 99 pclk = clk_get(&at32_intc0_device.dev, "pclk"); 100 if (IS_ERR(pclk)) { 105 clk_enable(pclk);
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H A D | at32ap7000.c | 435 .name = "pclk", 453 DEV_CLK(pclk, at32_intc0, pbb, 1); 475 DEV_CLK(pclk, smc0, pbb, 13); 483 DEV_CLK(pclk, pdc, pba, 16); 542 DEV_CLK(pclk, at32_systc0, pbb, 3); 734 DEV_CLK(pclk, macb0, pbb, 6); 743 DEV_CLK(pclk, macb1, pbb, 7);
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/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/avr32/boards/atngw100/ |
H A D | setup.c | 68 struct clk *pclk; local 85 pclk = clk_get(&pdev->dev, "pclk"); 86 if (!pclk) 89 clk_enable(pclk); 93 clk_disable(pclk); 94 clk_put(pclk);
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/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/drivers/ide/pci/ |
H A D | cy82c693.c | 279 pio_clocks_t pclk; local 306 pci_read_config_byte(dev, CY82_IDE_MASTER_IOR, &pclk.time_16r); 307 pci_read_config_byte(dev, CY82_IDE_MASTER_IOW, &pclk.time_16w); 308 pci_read_config_byte(dev, CY82_IDE_MASTER_8BIT, &pclk.time_8); 321 pci_read_config_byte(dev, CY82_IDE_SLAVE_IOR, &pclk.time_16r); 322 pci_read_config_byte(dev, CY82_IDE_SLAVE_IOW, &pclk.time_16w); 323 pci_read_config_byte(dev, CY82_IDE_SLAVE_8BIT, &pclk.time_8); 329 addrCtrl, pclk.time_16r, pclk.time_16w, pclk [all...] |
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/avr32/boards/atstk1000/ |
H A D | atstk1002.c | 75 struct clk *pclk; local 92 pclk = clk_get(&pdev->dev, "pclk"); 93 if (!pclk) 96 clk_enable(pclk); 100 clk_disable(pclk); 101 clk_put(pclk);
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/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/arm/mach-s3c2410/ |
H A D | s3c2410.c | 76 unsigned long pclk; local 88 pclk = hclk / ((tmp & S3C2410_CLKDIVN_PDIVN) ? 2 : 1); 93 print_mhz(fclk), print_mhz(hclk), print_mhz(pclk)); 99 s3c24xx_setup_clocks(xtal, fclk, hclk, pclk);
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/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/arm/plat-s3c24xx/ |
H A D | time.c | 66 timer_mask_usec_ticks(unsigned long scaler, unsigned long pclk) argument 68 unsigned long den = pclk / 1000; 182 unsigned long pclk; local 185 /* for the h1940 (and others), we use the pclk from the core 202 pclk = clk_get_rate(clk); 206 timer_usec_ticks = timer_mask_usec_ticks(6, pclk); 214 tcnt = (pclk / 6) / HZ;
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H A D | s3c244x.c | 78 unsigned long hclk, fclk, pclk; local 110 pclk = hclk / ((clkdiv & S3C2440_CLKDIVN_PDIVN)? 2:1); 115 print_mhz(fclk), print_mhz(hclk), print_mhz(pclk)); 121 s3c24xx_setup_clocks(xtal, fclk, hclk, pclk);
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H A D | clock.c | 253 .name = "pclk", 424 unsigned long pclk) 435 clk_p.rate = pclk; 458 printk(KERN_ERR "failed to register cpu pclk\n"); 421 s3c24xx_setup_clocks(unsigned long xtal, unsigned long fclk, unsigned long hclk, unsigned long pclk) argument
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/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/arm/mach-lh7a40x/ |
H A D | clocks.c | 72 unsigned int pclk; local 75 pclk = hclkfreq_get () / (1 << pclkdiv); 77 return pclk;
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/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/arm/mach-s3c2412/ |
H A D | s3c2412.c | 160 unsigned long pclk; local 173 pclk = hclk / ((tmp & S3C2412_CLKDIVN_PDIVN) ? 2 : 1); 178 print_mhz(fclk), print_mhz(hclk), print_mhz(pclk)); 184 s3c24xx_setup_clocks(xtal, fclk, hclk, pclk);
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/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/include/asm-arm/plat-s3c24xx/ |
H A D | clock.h | 64 unsigned long pclk);
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/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/drivers/net/ |
H A D | macb.c | 1027 bp->pclk = clk_get(&pdev->dev, "macb_clk"); 1028 if (IS_ERR(bp->pclk)) { 1032 clk_enable(bp->pclk); 1034 bp->pclk = clk_get(&pdev->dev, "pclk"); 1035 if (IS_ERR(bp->pclk)) { 1036 dev_err(&pdev->dev, "failed to get pclk\n"); 1045 clk_enable(bp->pclk); 1082 pclk_hz = clk_get_rate(bp->pclk); 1149 clk_disable(bp->pclk); [all...] |
H A D | macb.h | 374 struct clk *pclk; member in struct:macb
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/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/arm/mach-s3c2443/ |
H A D | clock.c | 942 unsigned long pclk; local 952 pclk = hclk / ((clkdiv0 & S3C2443_CLKDIV0_HALF_PCLK) ? 2 : 1); 954 s3c24xx_setup_clocks(xtal, fclk, hclk, pclk); 956 printk("S3C2443: mpll %s %ld.%03ld MHz, cpu %ld.%03ld MHz, mem %ld.%03ld MHz, pclk %ld.%03ld MHz\n", 959 print_mhz(hclk), print_mhz(pclk));
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/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/drivers/video/ |
H A D | acornfb.c | 176 struct pixclock *pclk; local 186 pclk = acornfb_valid_pixrate(var); 187 vidc_ctl = pclk->vidc_ctl; 188 vid_ctl = pclk->vid_ctl;
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