Searched refs:mode (Results 1 - 25 of 716) sorted by relevance

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/u-boot/arch/mips/mach-octeon/include/mach/
H A Dcvmx-helper-ipd.h11 void cvmx_helper_ipd_set_wqe_no_ptr_mode(bool mode);
12 void cvmx_helper_ipd_pkt_wqe_le_mode(bool mode);
H A Docteon_qlm.h16 * Configure qlm/dlm speed and mode.
19 * @param mode The QLM to be configured as SGMII/XAUI/PCIe.
20 * @param rc Only used for PCIe, rc = 1 for root complex mode, 0 for EP
21 * mode.
22 * @param pcie_mode Only used when qlm/dlm are in pcie mode.
42 * XLAUI mode with a 6316 speed or XFI mode with a 103125 speed.
45 int octeon_configure_qlm(int qlm, int speed, int mode, int rc, int pcie_mode, int ref_clk_sel,
48 int octeon_configure_qlm_cn78xx(int node, int qlm, int speed, int mode, int rc, int pcie_mode,
92 * @param mode Th
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/u-boot/drivers/reboot-mode/
H A DMakefile7 obj-$(CONFIG_DM_REBOOT_MODE) += reboot-mode-uclass.o
8 obj-$(CONFIG_DM_REBOOT_MODE_GPIO) += reboot-mode-gpio.o
9 obj-$(CONFIG_DM_REBOOT_MODE_RTC) += reboot-mode-rtc.o
10 obj-$(CONFIG_REBOOT_MODE_NVMEM) += reboot-mode-nvmem.o
H A Dreboot-mode-nvmem.c9 #include <reboot-mode/reboot-mode.h>
12 * struct nvmem_reboot_mode_priv - Private data for the nvmem reboot mode device
13 * @cell: The nvmem cell to store the mode in
19 static int reboot_mode_get(struct udevice *dev, u32 *mode) argument
23 return nvmem_cell_read(&priv->cell, mode, sizeof(*mode));
26 static int reboot_mode_set(struct udevice *dev, u32 mode) argument
30 return nvmem_cell_write(&priv->cell, &mode, sizeof(mode));
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/u-boot/arch/arm/mach-versal/include/mach/
H A Dsys_proto.h13 void initialize_tcm(bool mode);
14 void tcm_init(u8 mode);
/u-boot/arch/arm/include/asm/arch-meson/
H A Dusb.h10 int dwc3_meson_g12a_force_mode(struct udevice *dev, enum usb_dr_mode mode);
H A Dusb-gx.h13 void phy_meson_gxl_usb2_set_mode(struct phy *phy, enum usb_dr_mode mode);
15 int dwc3_meson_gxl_force_mode(struct udevice *dev, enum usb_dr_mode mode);
/u-boot/board/freescale/common/
H A Dpfuze.h11 int pfuze_mode_init(struct udevice *dev, u32 mode);
14 int pfuze_mode_init(struct pmic *p, u32 mode);
/u-boot/arch/arm/mach-zynq/
H A Dspl.c48 u32 mode; local
53 mode = BOOT_DEVICE_SPI;
57 mode = BOOT_DEVICE_NAND;
60 mode = BOOT_DEVICE_NOR;
64 mode = BOOT_DEVICE_MMC1;
68 mode = BOOT_DEVICE_RAM;
71 puts("Unsupported boot mode selected\n");
75 return mode;
/u-boot/arch/arm/mach-imx/
H A Dvideo.c29 panel = dev->mode.name;
35 panel = displays[0].mode.name;
41 if (!strcmp(panel, displays[i].mode.name))
47 ret = ipuv3_fb_init(&displays[i].mode, displays[i].di ? 1 : 0,
54 displays[i].mode.name,
55 displays[i].mode.xres,
56 displays[i].mode.yres);
59 if (!strcmp(displays[i].mode.name, "HDMI"))
64 displays[i].mode.name, ret);
/u-boot/arch/mips/mach-mscc/
H A Dgpio.c9 void mscc_gpio_set_alternate(int gpio, int mode) argument
17 if (mode == 1) {
20 } else if (mode == 2) {
23 } else if (mode == 3) {
/u-boot/drivers/extcon/
H A Dextcon-max14526.c42 static void max14526_set_mode(struct udevice *dev, int mode) argument
47 if ((mode & AP_USB) || (mode & CP_USB)) {
54 if (mode & CP_UART) {
61 if (mode & CP_USB) {
72 if ((mode & AP_USB) || (mode & CP_UART)) {
79 if (mode & AP_USB) {
86 if ((mode & CP_USB) || (mode
102 int ret, mode = 0; local
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/u-boot/drivers/video/
H A Dvideomodes.c9 Get Parameters for the video mode:
10 The default video mode is set to 0x301
14 mode. Following modes are implemented:
29 the default mode, which is one of the following:
30 mode:0 640x480x24
31 mode:1 800x600x16
32 mode:2 1024x768x8
33 mode:3 960x720x24
34 mode:4 1152x864x16
35 mode
163 int mode; local
388 video_edid_dtd_to_ctfb_res_modes(struct edid_detailed_timing *t, struct ctfb_res_modes *mode) argument
448 video_ctfb_mode_to_display_timing(const struct ctfb_res_modes *mode, struct display_timing *timing) argument
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H A Defi.c56 * get_mode_info() - Ask EFI for the mode information
60 * @vesa: Place to put the mode information
62 * @infop: Returns a pointer to the mode info
71 struct efi_gop_mode *mode; local
80 mode = gop->mode;
81 log_debug("maxmode %u, mode %u, info %p, size %lx, fb %lx, fb_size %lx\n",
82 mode->max_mode, mode->mode, mod
108 struct efi_gop_mode *mode; local
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/u-boot/drivers/video/sunxi/
H A Dlcdc.c18 static int lcdc_get_clk_delay(const struct display_timing *mode, int tcon) argument
22 delay = mode->vfront_porch.typ + mode->vsync_len.typ +
23 mode->vback_porch.typ;
24 if (mode->flags & DISPLAY_FLAGS_INTERLACED)
73 const struct display_timing *mode,
85 clk_delay = lcdc_get_clk_delay(mode, 0);
92 writel(SUNXI_LCDC_X(mode->hactive.typ) |
93 SUNXI_LCDC_Y(mode->vactive.typ), &lcdc->tcon0_timing_active);
95 bp = mode
72 lcdc_tcon0_mode_set(struct sunxi_lcdc_reg * const lcdc, const struct display_timing *mode, int clk_div, bool for_ext_vga_dac, int depth, int dclk_phase) argument
150 lcdc_tcon1_mode_set(struct sunxi_lcdc_reg * const lcdc, const struct display_timing *mode, bool ext_hvsync, bool is_composite) argument
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/u-boot/arch/arm/mach-versal/
H A Dmp.c26 static void set_r5_halt_mode(u8 halt, u8 mode) argument
37 if (mode == TCM_LOCK) {
47 static void set_r5_tcm_mode(u8 mode) argument
52 if (mode == TCM_LOCK) {
65 static void release_r5_reset(u8 mode) argument
74 if (mode == TCM_LOCK)
89 void initialize_tcm(bool mode) argument
91 if (!mode) {
104 void tcm_init(u8 mode) argument
107 initialize_tcm(mode);
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/u-boot/drivers/clk/
H A Dmpc83xx_clk.h137 * struct clk_mode - Structure for clock mode descriiptions
138 * @low: The low bit of the data field to read for this mode (may not apply to
140 * @high: The high bit of the data field to read for this mode (may not apply to
142 * @type: The type of the mode description (one of enum mode_type)
151 * set_mode() - Build a clock mode description from data
152 * @mode: The clock mode description to be filled out
153 * @low: The low bit of the data field to read for this mode (may not apply to
155 * @high: The high bit of the data field to read for this mode (may not apply to
157 * @type: The type of the mode descriptio
164 set_mode(struct clk_mode *mode, u8 low, u8 high, int type) argument
185 retrieve_mode(int clk, int soc_type, struct clk_mode *mode) argument
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/u-boot/arch/arm/mach-uniphier/boot-device/
H A Dboot-device-pxs2.c56 unsigned int uniphier_pxs2_boot_device_fixup(unsigned int mode) argument
58 if (mode == BOOT_DEVICE_USB)
61 return mode;
/u-boot/arch/arm/mach-exynos/
H A Dsystem.c11 static void exynos5_set_usbhost_mode(unsigned int mode) argument
17 if (mode == USB20_PHY_CFG_HOST_LINK_EN) {
26 void set_usbhost_mode(unsigned int mode) argument
29 exynos5_set_usbhost_mode(mode);
/u-boot/board/novtech/meerkat96/
H A Dmeerkat96.c56 char *mode; local
59 mode = "secure";
61 mode = "non-secure";
63 printf("Board: i.MX7D Meerkat96 in %s mode\n", mode);
/u-boot/include/dm/platform_data/
H A Dspi_coldfire.h17 * @mode: default SPI mode
23 uint mode; member in struct:coldfire_spi_plat
/u-boot/arch/arm/include/asm/arch-sunxi/
H A Dwatchdog.h25 u32 mode; /* 0x04 */ member in struct:sunxi_wdog
40 u32 mode; /* 0x18 */ member in struct:sunxi_wdog
/u-boot/arch/arm/mach-zynqmp/include/mach/
H A Dsys_proto.h51 void initialize_tcm(bool mode);
54 void tcm_init(u8 mode);
/u-boot/arch/arm/mach-omap2/omap4/
H A Dboot.c62 int omap_reboot_mode(char *mode, unsigned int length) argument
77 mode[i] = readb((u8 *)(OMAP44XX_SAR_RAM_BASE +
80 mode[i] = '\0';
92 int omap_reboot_mode_store(char *mode) argument
96 for (i = 0; i < (OMAP_REBOOT_REASON_SIZE - 1) && mode[i] != '\0'; i++)
97 writeb(mode[i], (u8 *)(OMAP44XX_SAR_RAM_BASE +
/u-boot/drivers/soc/samsung/
H A Dexynos-usi.c52 size_t mode; /* current USI SW_CONF mode index */ member in struct:exynos_usi
63 const char *name; /* mode name */
64 unsigned int val; /* mode register value */
90 * exynos_usi_set_sw_conf - Set USI block configuration mode
94 * in @usi.mode.
101 size_t mode = usi->mode; local
105 if (mode < usi->data->min_mode || mode > us
167 u32 mode; local
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