1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright (C) 2019 Linaro Ltd.
4 * Copyright (C) 2016 NXP Semiconductors
5 */
6
7#include <init.h>
8#include <asm/arch/clock.h>
9#include <asm/arch/imx-regs.h>
10#include <asm/arch/mx7-pins.h>
11#include <asm/arch/sys_proto.h>
12#include <asm/global_data.h>
13#include <asm/mach-imx/iomux-v3.h>
14#include <asm/io.h>
15#include <common.h>
16#include <linux/sizes.h>
17
18DECLARE_GLOBAL_DATA_PTR;
19
20#define UART_PAD_CTRL  (PAD_CTL_DSE_3P3V_49OHM | \
21			PAD_CTL_PUS_PU100KOHM | PAD_CTL_HYS)
22
23static iomux_v3_cfg_t const meerkat96_pads[] = {
24	/* UART6 as debug serial */
25	MX7D_PAD_SD1_CD_B__UART6_DCE_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
26	MX7D_PAD_SD1_WP__UART6_DCE_TX   | MUX_PAD_CTRL(UART_PAD_CTRL),
27	/* WDOG1 for reset */
28	MX7D_PAD_GPIO1_IO00__WDOG1_WDOG_B | MUX_PAD_CTRL(NO_PAD_CTRL),
29};
30
31int dram_init(void)
32{
33	gd->ram_size = PHYS_SDRAM_SIZE;
34
35	return 0;
36}
37
38int board_early_init_f(void)
39{
40	imx_iomux_v3_setup_multiple_pads(meerkat96_pads,
41					 ARRAY_SIZE(meerkat96_pads));
42
43	return 0;
44}
45
46int board_init(void)
47{
48	/* address of boot parameters */
49	gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
50
51	return 0;
52}
53
54int checkboard(void)
55{
56	char *mode;
57
58	if (IS_ENABLED(CONFIG_ARMV7_BOOT_SEC_DEFAULT))
59		mode = "secure";
60	else
61		mode = "non-secure";
62
63	printf("Board: i.MX7D Meerkat96 in %s mode\n", mode);
64
65	return 0;
66}
67
68int board_late_init(void)
69{
70	set_wdog_reset((struct wdog_regs *)WDOG1_BASE_ADDR);
71
72	return 0;
73}
74