Searched refs:mmVM_CONTEXT1_CNTL (Results 1 - 16 of 16) sorted by path

/linux-master/drivers/gpu/drm/amd/include/asic_reg/gmc/
H A Dgmc_6_0_d.h1231 #define mmVM_CONTEXT1_CNTL 0x0505 macro
H A Dgmc_7_0_d.h546 #define mmVM_CONTEXT1_CNTL 0x505 macro
H A Dgmc_7_1_d.h579 #define mmVM_CONTEXT1_CNTL 0x505 macro
H A Dgmc_8_1_d.h602 #define mmVM_CONTEXT1_CNTL 0x505 macro
H A Dgmc_8_2_d.h604 #define mmVM_CONTEXT1_CNTL 0x505 macro
/linux-master/drivers/gpu/drm/amd/include/asic_reg/mmhub/
H A Dmmhub_9_1_offset.h1358 #define mmVM_CONTEXT1_CNTL 0x06c1 macro
H A Dmmhub_9_3_0_offset.h1342 #define mmVM_CONTEXT1_CNTL 0x06c1 macro
H A Dmmhub_1_0_offset.h1326 #define mmVM_CONTEXT1_CNTL 0x06c1 macro
/linux-master/drivers/gpu/drm/amd/amdgpu/
H A Dgfxhub_v1_0.c265 tmp = RREG32_SOC15_OFFSET(GC, 0, mmVM_CONTEXT1_CNTL, i * hub->ctx_distance);
295 WREG32_SOC15_OFFSET(GC, 0, mmVM_CONTEXT1_CNTL,
438 hub->ctx_distance = mmVM_CONTEXT1_CNTL - mmVM_CONTEXT0_CNTL;
H A Dgmc_v6_0.c391 tmp = RREG32(mmVM_CONTEXT1_CNTL);
404 WREG32(mmVM_CONTEXT1_CNTL, tmp);
539 WREG32(mmVM_CONTEXT1_CNTL,
587 WREG32(mmVM_CONTEXT1_CNTL, 0);
1043 tmp = RREG32(mmVM_CONTEXT1_CNTL);
1045 WREG32(mmVM_CONTEXT1_CNTL, tmp);
1051 tmp = RREG32(mmVM_CONTEXT1_CNTL);
1053 WREG32(mmVM_CONTEXT1_CNTL, tmp);
H A Dgmc_v7_0.c517 tmp = RREG32(mmVM_CONTEXT1_CNTL);
530 WREG32(mmVM_CONTEXT1_CNTL, tmp);
680 tmp = RREG32(mmVM_CONTEXT1_CNTL);
685 WREG32(mmVM_CONTEXT1_CNTL, tmp);
734 WREG32(mmVM_CONTEXT1_CNTL, 0);
1237 tmp = RREG32(mmVM_CONTEXT1_CNTL);
1239 WREG32(mmVM_CONTEXT1_CNTL, tmp);
1247 tmp = RREG32(mmVM_CONTEXT1_CNTL);
1249 WREG32(mmVM_CONTEXT1_CNTL, tmp);
H A Dgmc_v8_0.c729 tmp = RREG32(mmVM_CONTEXT1_CNTL);
744 WREG32(mmVM_CONTEXT1_CNTL, tmp);
910 tmp = RREG32(mmVM_CONTEXT1_CNTL);
922 WREG32(mmVM_CONTEXT1_CNTL, tmp);
965 WREG32(mmVM_CONTEXT1_CNTL, 0);
1398 tmp = RREG32(mmVM_CONTEXT1_CNTL);
1400 WREG32(mmVM_CONTEXT1_CNTL, tmp);
1408 tmp = RREG32(mmVM_CONTEXT1_CNTL);
1410 WREG32(mmVM_CONTEXT1_CNTL, tmp);
H A Dmmhub_v1_0.c247 tmp = RREG32_SOC15_OFFSET(MMHUB, 0, mmVM_CONTEXT1_CNTL, i * hub->ctx_distance);
273 WREG32_SOC15_OFFSET(MMHUB, 0, mmVM_CONTEXT1_CNTL,
441 hub->ctx_distance = mmVM_CONTEXT1_CNTL - mmVM_CONTEXT0_CNTL;
/linux-master/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h1234 #define mmVM_CONTEXT1_CNTL 0x0881 macro
H A Dgc_9_1_offset.h1253 #define mmVM_CONTEXT1_CNTL 0x0881 macro
H A Dgc_9_2_1_offset.h1191 #define mmVM_CONTEXT1_CNTL 0x0881 macro

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