Searched refs:mmUVD_DPG_LMA_CTL_BASE_IDX (Results 1 - 8 of 8) sorted by path

/linux-master/drivers/gpu/drm/amd/include/asic_reg/vcn/
H A Dvcn_1_0_offset.h37 #define mmUVD_DPG_LMA_CTL_BASE_IDX 1 macro
H A Dvcn_2_0_0_offset.h395 #define mmUVD_DPG_LMA_CTL_BASE_IDX 1 macro
H A Dvcn_2_5_offset.h410 #define mmUVD_DPG_LMA_CTL_BASE_IDX 1 macro
H A Dvcn_3_0_0_offset.h686 #define mmUVD_DPG_LMA_CTL_BASE_IDX 1 macro
/linux-master/drivers/gpu/drm/amd/amdgpu/
H A Djpeg_v4_0_5.c38 #define mmUVD_DPG_LMA_CTL_BASE_IDX regUVD_DPG_LMA_CTL_BASE_IDX macro
H A Dvcn_v4_0.c43 #define mmUVD_DPG_LMA_CTL_BASE_IDX regUVD_DPG_LMA_CTL_BASE_IDX macro
H A Dvcn_v4_0_3.c41 #define mmUVD_DPG_LMA_CTL_BASE_IDX regUVD_DPG_LMA_CTL_BASE_IDX macro
H A Dvcn_v4_0_5.c43 #define mmUVD_DPG_LMA_CTL_BASE_IDX regUVD_DPG_LMA_CTL_BASE_IDX macro

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