/linux-master/arch/arm/mach-imx/ |
H A D | suspend-imx53.S | 45 ldr r1, [r0, #SUSPEND_INFO_MX53_IO_COUNT_OFFSET] 50 ldr r3, [r0, #SUSPEND_INFO_MX53_IOMUXC_V_OFFSET] 53 ldr r5, [r2], #12 /* IOMUXC register offset */ 54 ldr r6, [r3, r5] /* current value */ 61 ldr r1, [r0, #SUSPEND_INFO_MX53_M4IF_V_OFFSET] 62 ldr r2,[r1, #M4IF_MCR0_OFFSET] 68 ldr r2,[r1, #M4IF_MCR0_OFFSET] 73 ldr r1, [r0, #SUSPEND_INFO_MX53_IO_COUNT_OFFSET] 78 ldr r3, [r0, #SUSPEND_INFO_MX53_IOMUXC_V_OFFSET] 81 ldr r [all...] |
H A D | suspend-imx6.S | 78 ldr r11, [r0, #PM_INFO_MX6Q_L2_V_OFFSET] 84 ldr r6, [r11, #L2X0_CACHE_SYNC] 99 ldr r6, [r0, #PM_INFO_MMDC_IO_NUM_OFFSET] 100 ldr r7, =PM_INFO_MMDC_IO_VAL_OFFSET 103 ldr r8, [r7], #0x4 104 ldr r9, [r7], #0x4 117 ldr r7, =MX6Q_MMDC_MPDGCTRL0 118 ldr r6, [r11, r7] 122 ldr r6, [r11, r7] 127 ldr r [all...] |
H A D | ssi-fiq.S | 42 ldr r12, .L_imx_ssi_fiq_base 45 ldr r13, .L_imx_ssi_fiq_tx_buffer 48 ldr r11, [r12, #SSI_SIER] 53 ldr r11, [r12, #SSI_SISR] 84 ldr r11, [r12, #SSI_SIER] 89 ldr r11, [r12, #SSI_SISR] 93 ldr r13, .L_imx_ssi_fiq_rx_buffer 101 ldr r11, [r12, #SSI_SACNT] 104 ldr r11, [r12, #SSI_SRX0] 107 ldr r1 [all...] |
/linux-master/arch/arm/mach-exynos/ |
H A D | sleep.S | 37 ldr r1, =CPU_MASK 39 ldr r1, =CPU_CORTEX_A9 51 ldr r1, =CPU_MASK 53 ldr r1, =CPU_CORTEX_A9 58 ldr r1, [r0] 59 ldr r1, [r0, r1] 61 ldr r2, [r0] 62 ldr r2, [r0, r2] 68 ldr r2, [r0] 72 ldr r [all...] |
/linux-master/arch/arm/include/debug/ |
H A D | s3c24xx.S | 17 ldr \rp, = CONFIG_DEBUG_UART_PHYS 18 ldr \rv, = CONFIG_DEBUG_UART_VIRT 22 ldr \rd, [\rx, # S3C2410_UFSTAT] 27 ldr \rd, [\rx, # S3C2410_UFSTAT]
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H A D | bcm63xx.S | 11 ldr \rp, =CONFIG_DEBUG_UART_PHYS 12 ldr \rv, =CONFIG_DEBUG_UART_VIRT 21 1001: ldr \rd, [\rx, #UART_IR_REG] 30 1002: ldr \rd, [\rx, #UART_IR_REG]
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H A D | meson.S | 14 ldr \rp, =(CONFIG_DEBUG_UART_PHYS) @ physical 15 ldr \rv, =(CONFIG_DEBUG_UART_VIRT) @ virtual 23 1002: ldr \rd, [\rx, #MESON_AO_UART_STATUS] 32 1001: ldr \rd, [\rx, #MESON_AO_UART_STATUS]
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H A D | sti.S | 18 ldr \rp, =CONFIG_DEBUG_UART_PHYS @ physical base 19 ldr \rv, =CONFIG_DEBUG_UART_VIRT @ virt base 30 1001: ldr \rd, [\rx, #ASC_STA_OFF] 36 1001: ldr \rd, [\rx, #ASC_STA_OFF]
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H A D | s5pv210.S | 20 ldr \rp, =S5PV210_PA_UART 21 ldr \rv, =S3C_VA_UART
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H A D | pl01x.S | 13 ldr \rp, =CONFIG_DEBUG_UART_PHYS 14 ldr \rv, =CONFIG_DEBUG_UART_VIRT 26 1001: ldr \rd, [\rx, #UART01x_FR] 33 1001: ldr \rd, [\rx, #UART01x_FR]
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H A D | asm9260.S | 10 ldr \rp, = CONFIG_DEBUG_UART_PHYS 11 ldr \rv, = CONFIG_DEBUG_UART_VIRT 25 1002: ldr \rd, [\rx, #0x60] @ STAT
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/linux-master/drivers/memory/ |
H A D | ti-emif-sram-pm.S | 46 ldr r0, [r4, #EMIF_PM_BASE_ADDR_VIRT_OFFSET] 47 ldr r2, [r4, #EMIF_PM_REGS_VIRT_OFFSET] 50 ldr r1, [r0, #EMIF_SDRAM_CONFIG] 53 ldr r1, [r0, #EMIF_SDRAM_REFRESH_CONTROL] 56 ldr r1, [r0, #EMIF_SDRAM_TIMING_1] 59 ldr r1, [r0, #EMIF_SDRAM_TIMING_2] 62 ldr r1, [r0, #EMIF_SDRAM_TIMING_3] 65 ldr r1, [r0, #EMIF_POWER_MANAGEMENT_CONTROL] 68 ldr r1, [r0, #EMIF_POWER_MANAGEMENT_CTRL_SHDW] 71 ldr r [all...] |
/linux-master/tools/testing/selftests/arm64/fp/ |
H A D | fp-ptrace-asm.S | 28 ldr x7, =v_in 50 ldr x7, [x7, :lo12:svcr_in] 59 ldr x6, =za_in 84 ldr x7, =z_in 85 ldr z0, [x7, #0, MUL VL] 86 ldr z1, [x7, #1, MUL VL] 87 ldr z2, [x7, #2, MUL VL] 88 ldr z3, [x7, #3, MUL VL] 89 ldr z4, [x7, #4, MUL VL] 90 ldr z [all...] |
/linux-master/arch/arm/mach-omap2/ |
H A D | sleep43xx.S | 69 ldr r2, [r3, #AMX3_PM_RO_SRAM_DATA_VIRT_OFFSET] 74 ldr r1, get_l2cache_base 87 ldr r1, kernel_flush 104 ldr r1, kernel_flush 120 ldr r3, [r4, #AMX3_PM_RO_SRAM_DATA_VIRT_OFFSET] 123 ldr r0, [r2, #L2X0_AUX_CTRL] 125 ldr r0, [r2, #L310_PREFETCH_CTRL] 128 ldr r0, l2_val 131 ldr r0, [r2, #L2X0_CLEAN_INV_WAY] 132 ldr r [all...] |
H A D | sleep34xx.S | 76 ldr r2, [r3] @ value for offset 145 ldr r4, omap3_do_wfi_sram_addr 146 ldr r5, [r4] 162 ldr r1, kernel_flush 181 ldr r1, kernel_flush 206 ldr r4, sdrc_power @ read the SDRC_POWER register 207 ldr r5, [r4] @ read the contents of SDRC_POWER 252 ldr r4, cm_idlest_ckgen 254 ldr r5, [r4] 258 ldr r [all...] |
H A D | sleep33xx.S | 36 ldr r2, [r3, #AMX3_PM_RO_SRAM_DATA_VIRT_OFFSET] 47 ldr r1, kernel_flush 63 ldr r1, kernel_flush 67 ldr r2, [r3, #AMX3_PM_RO_SRAM_DATA_VIRT_OFFSET] 68 ldr r4, [r2, #AMX3_PM_WFI_FLAGS_OFFSET] 77 ldr r3, [r9, #EMIF_PM_ENTER_SR_OFFSET] 85 ldr r3, [r9, #EMIF_PM_SAVE_CONTEXT_OFFSET] 94 ldr r1, virt_emif_clkctrl 95 ldr r2, [r1] 99 ldr r [all...] |
/linux-master/arch/arm/lib/ |
H A D | io-readsw-armv3.S | 21 ldr r3, [r0] 42 .Linsw_8_lp: ldr r3, [r0] 44 ldr r4, [r0] 47 ldr r4, [r0] 49 ldr r5, [r0] 52 ldr r5, [r0] 54 ldr r6, [r0] 57 ldr r6, [r0] 59 ldr lr, [r0] 73 ldr r [all...] |
/linux-master/arch/arm/mach-at91/ |
H A D | pm_suspend.S | 42 2: ldr r8, [pmc, #AT91_PMC_SR] 54 1: ldr r7, [pmc, #AT91_PMC_SR] 65 1: ldr r7, [pmc, #AT91_PMC_SR] 99 ldr r7, .sfrbu 101 ldr r9, [r7, #AT91_SFRBU_25LDOCR] 107 ldr r10, =AT91_SFRBU_25LDOCR_LDOANAKEY 130 ldr r2, .sramc_base 131 ldr r3, .sramc_phy_base 132 ldr r7, .pm_mode 137 ldr tmp [all...] |
/linux-master/tools/testing/selftests/arm64/abi/ |
H A D | syscall-abi-asm.S | 86 ldr x2, [x2, :lo12:svcr_in] 93 ldr x2, =za_in 111 ldr x2, =gpr_in 123 ldr x28, [x2], #8 129 ldr x2, =svcr_in 132 ldr x2, =fpr_in 155 ldr x2, =z_in 156 ldr z0, [x2, #0, MUL VL] 157 ldr z1, [x2, #1, MUL VL] 158 ldr z [all...] |
/linux-master/arch/arm/mach-berlin/ |
H A D | headsmp.S | 19 ldr pc, [pc, #140]
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/linux-master/arch/arm/mach-rockchip/ |
H A D | headsmp.S | 10 ldr pc, 1f
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H A D | sleep.S | 30 ldr r3, rkpm_bootdata_l2ctlr_f 33 ldr r3, rkpm_bootdata_l2ctlr 36 ldr sp, rkpm_bootdata_cpusp 37 ldr r1, rkpm_bootdata_cpu_code
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/linux-master/arch/arm/kernel/ |
H A D | relocate_kernel.S | 16 ldr r0, [r7, #KEXEC_INDIR_PAGE] 17 ldr r1, [r7, #KEXEC_START_ADDR] 27 ldr r3, [r0],#4 54 ldr r5,[r3],#4 64 ldr r1, [r7, #KEXEC_MACH_TYPE] 65 ldr r2, [r7, #KEXEC_R2]
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/linux-master/arch/arm/mach-sa1100/ |
H A D | sleep.S | 36 ldr r6, =MDREFR 37 ldr r4, [r6] 39 ldr r5, =PPCR 81 ldr r0, =MSC0 82 ldr r1, =MSC1 83 ldr r2, =MSC2 85 ldr r3, [r0] 89 ldr r4, [r1] 93 ldr r5, [r2] 97 ldr r [all...] |
/linux-master/arch/arm/mach-pxa/ |
H A D | standby.S | 19 ldr r0, =PSSR 23 ldr ip, [r3] 59 ldr r2, [r1] @ Dummy read PXA3_MDCNFG 66 ldr r0, [r1, #PXA3_DDR_HCAL] @ Clear (and wait for) HCEN 69 1: ldr r0, [r1, #PXA3_DDR_HCAL] 73 ldr r0, [r1, #PXA3_RCOMP] @ Initiate RCOMP 80 ldr r0, [r1, #PXA3_DMCIER] @ set DMIER[EDLP] 84 ldr r0, [r1, #PXA3_DDR_HCAL] @ clear HCRNG, set HCPROG, HCEN 89 1: ldr r0, [r1, #PXA3_DMCISR] 93 ldr r [all...] |