| /linux-master/drivers/pinctrl/qcom/ |
| H A D | pinctrl-msm.h | 48 * @intr_status_reg: Offset of the register holding the status bits for this group.
59 * @intr_status_bit: Offset in @intr_status_reg for reading and acking the interrupt
84 u32 intr_status_reg; member in struct:msm_pingroup
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| H A D | pinctrl-qdf2xxx.c | 108 groups[gpio].intr_status_reg = 0x0c + 0x10000 * gpio;
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| H A D | pinctrl-ipq8064.c | 185 .intr_status_reg = 0x100c + 0x10 * id, \
212 .intr_status_reg = 0, \
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| H A D | pinctrl-sdm670.c | 39 .intr_status_reg = base + 0xc + REG_SIZE * id, \
69 .intr_status_reg = 0, \
94 .intr_status_reg = 0, \
119 .intr_status_reg = 0, \
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| H A D | pinctrl-sdx65.c | 35 .intr_status_reg = REG_BASE + 0xc + REG_SIZE * id, \
61 .intr_status_reg = 0, \
86 .intr_status_reg = 0, \
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| H A D | pinctrl-sm6115.c | 45 .intr_status_reg = 0xc + 0x1000 * id, \
72 .intr_status_reg = 0, \
98 .intr_status_reg = 0, \
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| H A D | pinctrl-sc7180.c | 43 .intr_status_reg = 0x1000 * id + 0xc, \
70 .intr_status_reg = 0, \
96 .intr_status_reg = 0, \
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| H A D | pinctrl-sm6125.c | 42 .intr_status_reg = 0xc + 0x1000 * id, \
69 .intr_status_reg = 0, \
95 .intr_status_reg = 0, \
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| H A D | pinctrl-sm7150.c | 49 .intr_status_reg = 0xc + REG_SIZE * id, \
76 .intr_status_reg = 0, \
102 .intr_status_reg = 0, \
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| H A D | pinctrl-sa8775p.c | 36 .intr_status_reg = REG_BASE + 0xc + REG_SIZE * id, \
65 .intr_status_reg = 0, \
90 .intr_status_reg = 0, \
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| H A D | pinctrl-msm8x74.c | 346 .intr_status_reg = 0x100c + 0x10 * id, \
372 .intr_status_reg = 0, \
403 .intr_status_reg = 0, \
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| H A D | pinctrl-qdu1000.c | 37 .intr_status_reg = REG_BASE + 0xc + REG_SIZE * id, \
63 .intr_status_reg = 0, \
88 .intr_status_reg = 0, \
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| H A D | pinctrl-qcm2290.c | 35 .intr_status_reg = 0xc + REG_SIZE * id, \
61 .intr_status_reg = 0, \
86 .intr_status_reg = 0, \
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| H A D | pinctrl-sm4450.c | 35 .intr_status_reg = 0xc + REG_SIZE * id, \
63 .intr_status_reg = 0, \
88 .intr_status_reg = 0, \
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| H A D | pinctrl-msm8226.c | 284 .intr_status_reg = 0x100c + 0x10 * id, \
310 .intr_status_reg = 0, \
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| H A D | pinctrl-sdx55.c | 35 .intr_status_reg = 0xc + REG_SIZE * id, \
61 .intr_status_reg = 0, \
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| H A D | pinctrl-apq8064.c | 233 .intr_status_reg = 0x100c + 0x10 * id, \
260 .intr_status_reg = 0, \
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| H A D | pinctrl-mdm9607.c | 227 .intr_status_reg = 0xc + 0x1000 * id, \
253 .intr_status_reg = 0, \
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| H A D | pinctrl-sc8280xp.c | 33 .intr_status_reg = 0xc + REG_SIZE * id, \
61 .intr_status_reg = 0, \
86 .intr_status_reg = 0, \
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| H A D | pinctrl-sc8180x.c | 62 .intr_status_reg = REG_SIZE * id + 0xc + offset,\
92 .intr_status_reg = 0, \
118 .intr_status_reg = 0, \
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| H A D | pinctrl-sc7280.c | 33 .intr_status_reg = 0x1000 * id + 0xc, \
61 .intr_status_reg = 0, \
86 .intr_status_reg = 0, \
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| H A D | pinctrl-sdm845.c | 39 .intr_status_reg = base + 0xc + REG_SIZE * id, \
65 .intr_status_reg = 0, \
90 .intr_status_reg = 0, \
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| H A D | pinctrl-sm8550.c | 37 .intr_status_reg = 0xc + REG_SIZE * id, \
66 .intr_status_reg = 0, \
91 .intr_status_reg = 0, \
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| H A D | pinctrl-sm8450.c | 36 .intr_status_reg = 0xc + REG_SIZE * id, \
64 .intr_status_reg = 0, \
89 .intr_status_reg = 0, \
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| H A D | pinctrl-sm8350.c | 36 .intr_status_reg = REG_SIZE * id + 0xc, \
62 .intr_status_reg = 0, \
87 .intr_status_reg = 0, \
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