/linux-master/drivers/irqchip/ |
H A D | irq-sp7021-intc.c | 81 static void sp_intc_assign_bit(u32 hwirq, void __iomem *base, bool value) argument 87 offset = (hwirq / 32) * 4; 93 mask |= BIT(hwirq % 32); 95 mask &= ~BIT(hwirq % 32); 102 u32 hwirq = d->hwirq; local 104 if (unlikely(IS_GPIO_INT(hwirq) && TEST_STATE(hwirq, _IS_EDGE))) { // WORKAROUND 105 sp_intc_assign_bit(hwirq, REG_INTR_POLARITY, !TEST_STATE(hwirq, _IS_LO 124 u32 hwirq = d->hwirq; local 171 int hwirq; local 195 sp_intc_irq_domain_map(struct irq_domain *domain, unsigned int irq, irq_hw_number_t hwirq) argument [all...] |
H A D | irq-mchp-eic.c | 51 tmp = readl_relaxed(eic->base + MCHP_EIC_SCFG(d->hwirq)); 53 writel_relaxed(tmp, eic->base + MCHP_EIC_SCFG(d->hwirq)); 62 tmp = readl_relaxed(eic->base + MCHP_EIC_SCFG(d->hwirq)); 64 writel_relaxed(tmp, eic->base + MCHP_EIC_SCFG(d->hwirq)); 74 tmp = readl_relaxed(eic->base + MCHP_EIC_SCFG(d->hwirq)); 96 writel_relaxed(tmp, eic->base + MCHP_EIC_SCFG(d->hwirq)); 103 irq_set_irq_wake(eic->irqs[d->hwirq], on); 105 eic->wakeup_source |= BIT(d->hwirq); 107 eic->wakeup_source &= ~BIT(d->hwirq); 114 unsigned int hwirq; local 128 unsigned int hwirq; local 160 irq_hw_number_t hwirq; local [all...] |
H A D | irq-or1k-pic.c | 28 mtspr(SPR_PICMR, mfspr(SPR_PICMR) & ~(1UL << data->hwirq)); 33 mtspr(SPR_PICMR, mfspr(SPR_PICMR) | (1UL << data->hwirq)); 38 mtspr(SPR_PICSR, (1UL << data->hwirq)); 43 mtspr(SPR_PICMR, mfspr(SPR_PICMR) & ~(1UL << data->hwirq)); 44 mtspr(SPR_PICSR, (1UL << data->hwirq)); 55 mtspr(SPR_PICSR, mfspr(SPR_PICSR) & ~(1UL << data->hwirq)); 60 mtspr(SPR_PICMR, mfspr(SPR_PICMR) & ~(1UL << data->hwirq)); 61 mtspr(SPR_PICSR, mfspr(SPR_PICSR) & ~(1UL << data->hwirq)); 102 int hwirq; local 104 hwirq [all...] |
H A D | irq-mbigen.c | 67 static inline unsigned int get_mbigen_vec_reg(irq_hw_number_t hwirq) argument 71 hwirq -= RESERVED_IRQ_PER_MBIGEN_CHIP; 72 nid = hwirq / IRQS_PER_MBIGEN_NODE + 1; 73 pin = hwirq % IRQS_PER_MBIGEN_NODE; 79 static inline void get_mbigen_type_reg(irq_hw_number_t hwirq, argument 84 hwirq -= RESERVED_IRQ_PER_MBIGEN_CHIP; 85 nid = hwirq / IRQS_PER_MBIGEN_NODE + 1; 86 irq_ofst = hwirq % IRQS_PER_MBIGEN_NODE; 95 static inline void get_mbigen_clear_reg(irq_hw_number_t hwirq, argument 98 unsigned int ofst = (hwirq / 3 168 mbigen_domain_translate(struct irq_domain *d, struct irq_fwspec *fwspec, unsigned long *hwirq, unsigned int *type) argument 201 irq_hw_number_t hwirq; local [all...] |
H A D | irq-rda-intc.c | 32 writel_relaxed(BIT(d->hwirq), rda_intc_base + RDA_INTC_MASK_CLR); 37 writel_relaxed(BIT(d->hwirq), rda_intc_base + RDA_INTC_MASK_SET); 52 u32 hwirq; local 55 hwirq = __fls(stat); 56 generic_handle_domain_irq(rda_irq_domain, hwirq); 57 stat &= ~BIT(hwirq);
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H A D | irq-riscv-intc.c | 54 if (IS_ENABLED(CONFIG_32BIT) && d->hwirq >= BITS_PER_LONG) 55 csr_clear(CSR_IEH, BIT(d->hwirq - BITS_PER_LONG)); 57 csr_clear(CSR_IE, BIT(d->hwirq)); 62 if (IS_ENABLED(CONFIG_32BIT) && d->hwirq >= BITS_PER_LONG) 63 csr_set(CSR_IEH, BIT(d->hwirq - BITS_PER_LONG)); 65 csr_set(CSR_IE, BIT(d->hwirq)); 71 * Andes specific S-mode local interrupt causes (hwirq) 75 unsigned int mask = BIT(d->hwirq % BITS_PER_LONG); 77 if (d->hwirq < ANDES_SLI_CAUSE_BASE) 85 unsigned int mask = BIT(d->hwirq 123 riscv_intc_domain_map(struct irq_domain *d, unsigned int irq, irq_hw_number_t hwirq) argument 140 irq_hw_number_t hwirq; local [all...] |
H A D | irq-partition-percpu.c | 26 unsigned int cpu, unsigned int hwirq) 28 return cpumask_test_cpu(cpu, &part->parts[hwirq].mask); 37 if (partition_check_cpu(part, smp_processor_id(), d->hwirq) && 48 if (partition_check_cpu(part, smp_processor_id(), d->hwirq) && 61 if (partition_check_cpu(part, smp_processor_id(), d->hwirq) && 76 if (partition_check_cpu(part, smp_processor_id(), d->hwirq) && 101 seq_printf(p, " %5s-%lu", chip->name, data->hwirq); 118 int hwirq; local 122 for_each_set_bit(hwirq, part->bitmap, part->nr_parts) { 123 if (partition_check_cpu(part, cpu, hwirq)) 25 partition_check_cpu(struct partition_desc *part, unsigned int cpu, unsigned int hwirq) argument 139 irq_hw_number_t hwirq; local [all...] |
H A D | irq-mvebu-sei.c | 59 u32 reg_idx = SEI_IRQ_REG_IDX(d->hwirq); 61 writel_relaxed(BIT(SEI_IRQ_REG_BIT(d->hwirq)), 68 u32 reg, reg_idx = SEI_IRQ_REG_IDX(d->hwirq); 74 reg |= BIT(SEI_IRQ_REG_BIT(d->hwirq)); 82 u32 reg, reg_idx = SEI_IRQ_REG_IDX(d->hwirq); 88 reg &= ~BIT(SEI_IRQ_REG_BIT(d->hwirq)); 144 msg->data = data->hwirq + sei->caps->cp_range.first; 199 unsigned long *hwirq, 202 *hwirq = fwspec->param[0]; 213 unsigned long hwirq; local 197 mvebu_sei_ap_translate(struct irq_domain *domain, struct irq_fwspec *fwspec, unsigned long *hwirq, unsigned int *type) argument 241 mvebu_sei_cp_release_irq(struct mvebu_sei *sei, unsigned long hwirq) argument 254 unsigned long hwirq; local 339 unsigned long hwirq; local [all...] |
H A D | irq-ls-extirq.c | 57 irq_hw_number_t hwirq = data->hwirq; local 61 mask = 1U << (31 - hwirq); 63 mask = 1U << hwirq; 104 irq_hw_number_t hwirq; local 109 hwirq = fwspec->param[0]; 110 if (hwirq >= priv->nirq) 113 irq_domain_set_hwirq_and_chip(domain, virq, hwirq, &ls_extirq_chip, 116 return irq_domain_alloc_irqs_parent(domain, virq, 1, &priv->map[hwirq]); 141 u32 hwirq, intsiz local [all...] |
H A D | irq-wpcm450-aic.c | 66 int hwirq; local 70 hwirq = readl(aic->regs + AIC_IPER) / 4; 72 generic_handle_domain_irq(aic->domain, hwirq); 83 unsigned int mask = BIT(d->hwirq); 91 unsigned int mask = BIT(d->hwirq); 119 static int wpcm450_aic_map(struct irq_domain *d, unsigned int irq, irq_hw_number_t hwirq) argument 121 if (hwirq >= AIC_NUM_IRQS)
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H A D | irq-loongarch-cpu.c | 56 clear_csr_ecfg(ECFGF(d->hwirq)); 61 set_csr_ecfg(ECFGF(d->hwirq)); 72 int hwirq; local 75 while ((hwirq = ffs(estat))) { 76 estat &= ~BIT(hwirq - 1); 77 generic_handle_domain_irq(irq_domain, hwirq - 1); 82 irq_hw_number_t hwirq) 81 loongarch_cpu_intc_map(struct irq_domain *d, unsigned int irq, irq_hw_number_t hwirq) argument
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H A D | irq-mmp.c | 71 int hwirq; local 74 hwirq = d->irq - data->virq_base; 76 r = readl_relaxed(mmp_icu_base + (hwirq << 2)); 79 writel_relaxed(r, mmp_icu_base + (hwirq << 2)); 83 && (hwirq == data->clr_mfp_hwirq)) 86 r = readl_relaxed(data->reg_mask) | (1 << hwirq); 95 int hwirq; local 98 hwirq = d->irq - data->virq_base; 100 r = readl_relaxed(mmp_icu_base + (hwirq << 2)); 103 writel_relaxed(r, mmp_icu_base + (hwirq << 124 int hwirq; local 227 int hwirq; local 238 int hwirq; local [all...] |
/linux-master/arch/powerpc/sysdev/ |
H A D | mpic_u3msi.c | 61 static u64 find_ht_magic_addr(struct pci_dev *pdev, unsigned int hwirq) argument 75 static u64 find_u4_magic_addr(struct pci_dev *pdev, unsigned int hwirq) argument 97 return 0xf8004000 | (hwirq << 4); 105 irq_hw_number_t hwirq; local 108 hwirq = virq_to_hw(entry->irq); 112 msi_bitmap_free_hwirqs(&msi_mpic->msi_bitmap, hwirq, 1); 122 int hwirq; local 136 hwirq = msi_bitmap_alloc_hwirqs(&msi_mpic->msi_bitmap, 1); 137 if (hwirq < 0) { 138 pr_debug("u3msi: failed allocating hwirq\ [all...] |
H A D | mpic_msi.c | 18 void mpic_msi_reserve_hwirq(struct mpic *mpic, irq_hw_number_t hwirq) argument 24 msi_bitmap_reserve_hwirq(&mpic->msi_bitmap, hwirq); 30 irq_hw_number_t hwirq; local 64 oirq.args_count, &hwirq, &flags); 65 msi_bitmap_reserve_hwirq(&mpic->msi_bitmap, hwirq);
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/linux-master/arch/powerpc/platforms/pasemi/ |
H A D | msi.c | 61 irq_hw_number_t hwirq; local 66 hwirq = virq_to_hw(entry->irq); 70 msi_bitmap_free_hwirqs(&msi_mpic->msi_bitmap, hwirq, ALLOC_CHUNK); 79 int hwirq; local 95 hwirq = msi_bitmap_alloc_hwirqs(&msi_mpic->msi_bitmap, 97 if (hwirq < 0) { 98 pr_debug("pasemi_msi: failed allocating hwirq\n"); 99 return hwirq; 102 virq = irq_create_mapping(msi_mpic->irqhost, hwirq); 104 pr_debug("pasemi_msi: failed mapping hwirq [all...] |
/linux-master/arch/arm/mach-mv78xx0/ |
H A D | irq.c | 34 unsigned int hwirq = __fls(stat); local 35 handle_IRQ(hwirq, regs); 41 unsigned int hwirq = 32 + __fls(stat); local 42 handle_IRQ(hwirq, regs); 48 unsigned int hwirq = 64 + __fls(stat); local 49 handle_IRQ(hwirq, regs);
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/linux-master/arch/powerpc/platforms/powernv/ |
H A D | pci-cxl.c | 43 int hwirq = msi_bitmap_alloc_hwirqs(&phb->msi_bmp, num); local 45 if (hwirq < 0) { 50 return phb->msi_base + hwirq; 54 void pnv_cxl_release_hwirqs(struct pci_dev *dev, int hwirq, int num) argument 59 msi_bitmap_free_hwirqs(&phb->msi_bmp, hwirq - phb->msi_base, num); 68 int i, hwirq; local 76 hwirq = irqs->offset[i] - phb->msi_base; 77 msi_bitmap_free_hwirqs(&phb->msi_bmp, hwirq, 88 int i, hwirq, try; local 96 hwirq 129 pnv_cxl_ioda_msi_setup(struct pci_dev *dev, unsigned int hwirq, unsigned int virq) argument [all...] |
/linux-master/arch/powerpc/platforms/85xx/ |
H A D | socrates_fpga_pic.c | 110 unsigned int irq_line, hwirq = irqd_to_hwirq(d); local 113 irq_line = fpga_irqs[hwirq].irq_line; 117 mask |= (1 << (hwirq + 16)); 125 unsigned int hwirq = irqd_to_hwirq(d); local 129 irq_line = fpga_irqs[hwirq].irq_line; 133 mask &= ~(1 << hwirq); 141 unsigned int hwirq = irqd_to_hwirq(d); local 145 irq_line = fpga_irqs[hwirq].irq_line; 149 mask &= ~(1 << hwirq); 150 mask |= (1 << (hwirq 158 unsigned int hwirq = irqd_to_hwirq(d); local 174 unsigned int hwirq = irqd_to_hwirq(d); local 191 unsigned int hwirq = irqd_to_hwirq(d); local 229 socrates_fpga_pic_host_map(struct irq_domain *h, unsigned int virq, irq_hw_number_t hwirq) argument [all...] |
/linux-master/arch/xtensa/include/asm/ |
H A D | irq.h | 24 #define XTENSA_PIC_LINUX_IRQ(hwirq) ((hwirq) + 1)
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/linux-master/arch/arc/kernel/ |
H A D | irq.c | 42 void arch_do_IRQ(unsigned int hwirq, struct pt_regs *regs) argument 48 generic_handle_domain_irq(NULL, hwirq);
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/linux-master/arch/powerpc/sysdev/ge/ |
H A D | ge_pic.c | 116 unsigned int hwirq = irqd_to_hwirq(d); local 121 mask &= ~(1 << hwirq); 137 unsigned int hwirq = irqd_to_hwirq(d); local 142 mask |= (1 << hwirq); 159 irq_hw_number_t hwirq) 234 int hwirq; local 243 for (hwirq = GEF_PIC_NUM_IRQS - 1; hwirq > -1; hwirq--) { 244 if (active & (0x1 << hwirq)) 158 gef_pic_host_map(struct irq_domain *h, unsigned int virq, irq_hw_number_t hwirq) argument [all...] |
/linux-master/arch/nios2/kernel/ |
H A D | irq.c | 19 asmlinkage void do_IRQ(int hwirq, struct pt_regs *regs) argument 24 generic_handle_domain_irq(NULL, hwirq); 32 ienable |= (1 << d->hwirq); 38 ienable &= ~(1 << d->hwirq);
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/linux-master/arch/arm/mach-dove/ |
H A D | irq.c | 50 unsigned int hwirq = 1 + __fls(stat); local 51 handle_IRQ(hwirq, regs); 57 unsigned int hwirq = 33 + __fls(stat); local 58 handle_IRQ(hwirq, regs);
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/linux-master/include/asm-generic/ |
H A D | msi.h | 18 * @hwirq: Associated hw interrupt number in the domain 26 irq_hw_number_t hwirq; member in struct:msi_alloc_info
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/linux-master/arch/arm/mach-imx/ |
H A D | gpc.c | 91 unsigned int idx = d->hwirq / 32; 94 mask = 1 << d->hwirq % 32; 125 void imx_gpc_hwirq_unmask(unsigned int hwirq) argument 130 reg = gpc_base + GPC_IMR1 + hwirq / 32 * 4; 132 val &= ~(1 << hwirq % 32); 136 void imx_gpc_hwirq_mask(unsigned int hwirq) argument 141 reg = gpc_base + GPC_IMR1 + hwirq / 32 * 4; 143 val |= 1 << (hwirq % 32); 149 imx_gpc_hwirq_unmask(d->hwirq); 155 imx_gpc_hwirq_mask(d->hwirq); 172 imx_gpc_domain_translate(struct irq_domain *d, struct irq_fwspec *fwspec, unsigned long *hwirq, unsigned int *type) argument 199 irq_hw_number_t hwirq; local [all...] |