Searched refs:h_start (Results 1 - 18 of 18) sorted by relevance

/linux-master/drivers/media/platform/ti/omap3isp/
H A Disph3a_af.c64 paxstart = conf->paxel.h_start << AF_HZ_START_SHIFT;
71 isp_reg_writel(af->isp, conf->iir.h_start,
192 if ((paxel_cfg->h_start < iir_cfg->h_start) ||
193 IS_OUT_OF_BOUNDS(paxel_cfg->h_start,
207 if (IS_OUT_OF_BOUNDS(iir_cfg->h_start, OMAP3ISP_AF_IIRSH_MIN,
257 if (cur_cfg->iir.h_start != user_cfg->iir.h_start) {
277 (cur_cfg->paxel.h_start != user_cfg->paxel.h_start) ||
[all...]
H A Disphist.c87 reg_hor[c] = (conf->region[c].h_start <<
321 if (user_cfg->region[c].h_start & ~ISPHIST_REG_START_END_MASK)
329 if (user_cfg->region[c].h_start > user_cfg->region[c].h_end)
387 if (cur_cfg->region[c].h_start != user_cfg->region[c].h_start)
/linux-master/include/uapi/linux/
H A Domap3isp.h234 __u16 h_start; member in struct:omap3isp_hist_region
285 __u16 h_start; /* IIR horizontal start */ member in struct:omap3isp_h3a_af_iir
292 __u16 h_start; /* Horizontal Start Position */ member in struct:omap3isp_h3a_af_paxel
/linux-master/drivers/media/pci/zoran/
H A Dzr36016.c220 ptr->name, norm->h_start, norm->v_start,
233 * already mentions what happens if h_start is even
235 * some good reason why h_start is 0 instead of 1, so I'm
239 ptr->xoff = (norm->h_start ? norm->h_start : 1) + cap->x;
H A Dzoran_device.c229 unsigned int h_start, h_end, v_start, v_end; local
260 h_start = tvn->h_start ? tvn->h_start : 1;
266 * However, the DC10 has '0' as h_start, but does need |1, so we
269 h_end = h_start + tvn->wa - 1;
270 h_start += hcrop1;
272 reg = ((h_start & ZR36057_VFEHCR_HMASK) << ZR36057_VFEHCR_H_START)
473 tvn->h_start + 4) << ZR36057_FHAP_NAX) |
H A Dvideocodec.h222 u16 wt, wa, h_start, h_sync_start, ht, ha, v_start; member in struct:tvnorm
H A Dzr36060.c571 reg = norm->h_start - 1; /* BHstart */
587 reg = cap->x + norm->h_start; /* Hstart */
604 reg = norm->h_start /*+ 64 */ - 4; /* SHstart */
H A Dzr36050.c551 ptr->name, norm->h_start, norm->v_start,
/linux-master/drivers/media/pci/saa7134/
H A Dsaa7134-vbi.c45 saa_writeb(SAA7134_VBI_H_START1(task), norm->h_start & 0xff);
46 saa_writeb(SAA7134_VBI_H_START2(task), norm->h_start >> 8);
H A Dsaa7134-video.c174 .h_start = 0, \
184 .h_start = 0, \
330 .h_start = 0,
367 dev->crop_bounds.left = norm->h_start;
368 dev->crop_defrect.left = norm->h_start;
369 dev->crop_bounds.width = norm->h_stop - norm->h_start +1;
370 dev->crop_defrect.width = norm->h_stop - norm->h_start +1;
528 int h_start, h_stop, v_start, v_stop; local
532 h_start = dev->crop_current.left;
537 saa_writeb(SAA7134_VIDEO_H_START1(task), h_start
538 saa_writeb(SAA7134_VIDEO_H_START2(task), h_start >> 8); local
[all...]
H A Dsaa7134.h82 unsigned int h_start; member in struct:saa7134_tvnorm
/linux-master/drivers/video/fbdev/
H A Dwm8505fb.c82 int h_start = info->var.left_margin; local
83 int h_end = h_start + info->var.xres;
94 writel(h_start, fbi->regbase + WMT_GOVR_TIMING_H_START);
/linux-master/drivers/media/pci/tw68/
H A Dtw68.h74 u32 h_start; member in struct:tw68_tvnorm
H A Dtw68-video.c84 .h_start = 0, \
96 .h_start = 0, \
175 .h_start = 0,
263 " tvnorm h_delay=%d, h_start=%d, h_stop=%d, v_delay=%d, v_start=%d, v_stop=%d\n",
265 norm->h_delay, norm->h_start, norm->h_stop,
278 hdelay += norm->h_start;
279 hactive = norm->h_stop - norm->h_start + 1;
/linux-master/drivers/media/platform/ti/vpe/
H A Dvpdma_priv.h292 static inline u32 dtd_start_h_v(int h_start, int v_start) argument
294 return (h_start << DTD_H_START_SHFT) | v_start;
/linux-master/drivers/media/i2c/
H A Dov2680.c140 u16 h_start; member in struct:ov2680_mode
357 sensor->mode.h_start = (sensor->mode.crop.left +
362 min(sensor->mode.h_start + width + OV2680_END_MARGIN - 1,
393 sensor->mode.h_start, &ret);
H A Dimx274.c1279 u32 h_start; local
1288 h_start = imx274->crop.left + 12;
1289 h_end = h_start + imx274->crop.width;
1308 h_start, 2);
/linux-master/drivers/video/fbdev/nvidia/
H A Dnvidia.c299 int h_start = (info->var.xres + info->var.right_margin) / 8 - 1; local
326 h_start = h_total - 5;
336 state->crtc[0x4] = Set8Bits(h_start);
373 | SetBitField(h_start, 8: 8, 3:3);

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