Searched refs:dwbc_mask (Results 1 - 10 of 10) sorted by relevance

/linux-master/drivers/gpu/drm/amd/display/dc/dcn35/
H A Ddcn35_dwb.c37 ((const struct dcn35_dwbc_mask *)(dwbc30->dwbc_mask)) \
47 const struct dcn35_dwbc_mask *dwbc_mask,
52 (const struct dcn30_dwbc_mask *)dwbc_mask, inst);
43 dcn35_dwbc_construct(struct dcn30_dwbc *dwbc30, struct dc_context *ctx, const struct dcn30_dwbc_registers *dwbc_regs, const struct dcn35_dwbc_shift *dwbc_shift, const struct dcn35_dwbc_mask *dwbc_mask, int inst) argument
H A Ddcn35_dwb.h56 const struct dcn35_dwbc_mask *dwbc_mask,
/linux-master/drivers/gpu/drm/amd/display/dc/dcn10/
H A Ddcn10_dwb.c40 dwbc10->dwbc_shift->field_name, dwbc10->dwbc_mask->field_name
118 const struct dcn10_dwbc_mask *dwbc_mask,
128 dwbc10->dwbc_mask = dwbc_mask;
114 dcn10_dwbc_construct(struct dcn10_dwbc *dwbc10, struct dc_context *ctx, const struct dcn10_dwbc_registers *dwbc_regs, const struct dcn10_dwbc_shift *dwbc_shift, const struct dcn10_dwbc_mask *dwbc_mask, int inst) argument
H A Ddcn10_dwb.h257 const struct dcn10_dwbc_mask *dwbc_mask; member in struct:dcn10_dwbc
264 const struct dcn10_dwbc_mask *dwbc_mask,
/linux-master/drivers/gpu/drm/amd/display/dc/dcn30/
H A Ddcn30_dwb_cm.c44 dwbc30->dwbc_shift->field_name, dwbc30->dwbc_mask->field_name
53 reg->masks.field_region_start_base = dwbc30->dwbc_mask->DWB_OGAM_RAMA_EXP_REGION_START_BASE_B;
55 reg->masks.field_offset = dwbc30->dwbc_mask->DWB_OGAM_RAMA_OFFSET_B;
58 reg->masks.exp_region0_lut_offset = dwbc30->dwbc_mask->DWB_OGAM_RAMA_EXP_REGION0_LUT_OFFSET;
60 reg->masks.exp_region0_num_segments = dwbc30->dwbc_mask->DWB_OGAM_RAMA_EXP_REGION0_NUM_SEGMENTS;
62 reg->masks.exp_region1_lut_offset = dwbc30->dwbc_mask->DWB_OGAM_RAMA_EXP_REGION1_LUT_OFFSET;
64 reg->masks.exp_region1_num_segments = dwbc30->dwbc_mask->DWB_OGAM_RAMA_EXP_REGION1_NUM_SEGMENTS;
67 reg->masks.field_region_end = dwbc30->dwbc_mask->DWB_OGAM_RAMA_EXP_REGION_END_B;
69 reg->masks.field_region_end_slope = dwbc30->dwbc_mask->DWB_OGAM_RAMA_EXP_REGION_END_SLOPE_B;
71 reg->masks.field_region_end_base = dwbc30->dwbc_mask
[all...]
H A Ddcn30_dwb.c41 dwbc30->dwbc_shift->field_name, dwbc30->dwbc_mask->field_name
263 const struct dcn30_dwbc_mask *dwbc_mask,
273 dwbc30->dwbc_mask = dwbc_mask;
259 dcn30_dwbc_construct(struct dcn30_dwbc *dwbc30, struct dc_context *ctx, const struct dcn30_dwbc_registers *dwbc_regs, const struct dcn30_dwbc_shift *dwbc_shift, const struct dcn30_dwbc_mask *dwbc_mask, int inst) argument
H A Ddcn30_dwb.h862 const struct dcn30_dwbc_mask *dwbc_mask; member in struct:dcn30_dwbc
869 const struct dcn30_dwbc_mask *dwbc_mask,
/linux-master/drivers/gpu/drm/amd/display/dc/dcn20/
H A Ddcn20_dwb.c43 dwbc20->dwbc_shift->field_name, dwbc20->dwbc_mask->field_name
320 const struct dcn20_dwbc_mask *dwbc_mask,
330 dwbc20->dwbc_mask = dwbc_mask;
316 dcn20_dwbc_construct(struct dcn20_dwbc *dwbc20, struct dc_context *ctx, const struct dcn20_dwbc_registers *dwbc_regs, const struct dcn20_dwbc_shift *dwbc_shift, const struct dcn20_dwbc_mask *dwbc_mask, int inst) argument
H A Ddcn20_dwb.h392 const struct dcn20_dwbc_mask *dwbc_mask; member in struct:dcn20_dwbc
399 const struct dcn20_dwbc_mask *dwbc_mask,
H A Ddcn20_dwb_scl.c44 dwbc20->dwbc_shift->field_name, dwbc20->dwbc_mask->field_name

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