Searched refs:divs (Results 1 - 25 of 33) sorted by relevance

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/linux-master/drivers/gpu/drm/nouveau/nvkm/subdev/therm/
H A Dfanpwm.c44 u32 divs, duty; local
47 ret = therm->func->pwm_get(therm, fan->func.line, &divs, &duty);
48 if (ret == 0 && divs) {
49 divs = max(divs, duty);
51 duty = divs - duty;
52 return (duty * 100) / divs;
63 u32 divs, duty; local
66 divs = fan->base.perf.pwm_divisor;
68 divs
91 u32 divs, duty; local
[all...]
H A Dgm107.c34 gm107_fan_pwm_get(struct nvkm_therm *therm, int line, u32 *divs, u32 *duty) argument
37 *divs = nvkm_rd32(device, 0x10eb20) & 0x1fff;
43 gm107_fan_pwm_set(struct nvkm_therm *therm, int line, u32 divs, u32 duty) argument
46 nvkm_mask(device, 0x10eb10, 0x1fff, divs); /* keep the high bits */
H A Dnv40.c121 nv40_fan_pwm_get(struct nvkm_therm *therm, int line, u32 *divs, u32 *duty) argument
129 *divs = (reg & 0x00007fff);
136 *divs = nvkm_rd32(device, 0x0015f8);
149 nv40_fan_pwm_set(struct nvkm_therm *therm, int line, u32 divs, u32 duty) argument
154 nvkm_mask(device, 0x0010f0, 0x7fff7fff, (duty << 16) | divs);
157 nvkm_wr32(device, 0x0015f8, divs);
H A Dgf119.c68 gf119_fan_pwm_get(struct nvkm_therm *therm, int line, u32 *divs, u32 *duty) argument
76 *divs = nvkm_rd32(device, 0x00e114 + (indx * 8));
81 *divs = nvkm_rd32(device, 0x0200d8) & 0x1fff;
90 gf119_fan_pwm_set(struct nvkm_therm *therm, int line, u32 divs, u32 duty) argument
97 nvkm_wr32(device, 0x00e114 + (indx * 8), divs);
100 nvkm_mask(device, 0x0200d8, 0x1fff, divs); /* keep the high bits */
H A Dnv50.c66 nv50_fan_pwm_get(struct nvkm_therm *therm, int line, u32 *divs, u32 *duty) argument
74 *divs = nvkm_rd32(device, 0x00e114 + (id * 8));
83 nv50_fan_pwm_set(struct nvkm_therm *therm, int line, u32 divs, u32 duty) argument
90 nvkm_wr32(device, 0x00e114 + (id * 8), divs);
/linux-master/drivers/clk/
H A Dclk-fsl-flexspi.c56 const struct clk_div_table *divs; local
58 divs = device_get_match_data(dev);
59 if (!divs)
81 reg, 0, 5, 0, divs, NULL);
/linux-master/drivers/clk/baikal-t1/
H A Dclk-ccu-div.c118 struct ccu_div **divs; member in struct:ccu_div_data
263 return data->divs[idx];
292 data->divs = kcalloc(data->divs_num, sizeof(*data->divs), GFP_KERNEL);
293 if (!data->divs) {
308 kfree(data->divs);
353 if (!data->divs[idx])
354 data->divs[idx] = ERR_PTR(-EPROBE_DEFER);
382 data->divs[idx] = ccu_div_hw_register(&init);
383 if (IS_ERR(data->divs[id
[all...]
/linux-master/drivers/gpu/drm/nouveau/nvkm/subdev/clk/
H A Dmcp77.c209 int divs = 0; local
213 out = calc_P(nvkm_clk_read(&clk->base, nv_clk_src_hclkm4), core, &divs);
220 clk->cctrl = divs << 16;
244 out = calc_P((core << 1), shader, &divs);
248 (divs + P2) <= 7) {
250 clk->sctrl = (divs + P2) << 16;
259 out = calc_P(core, vdec, &divs);
263 clk->vdiv = divs << 16;
H A Dnv50.c448 clk_mask(hwsq, divs, divsm, divsv);
/linux-master/arch/mips/include/asm/
H A Dmips-r2-to-r6-emul.h17 u64 divs; member in struct:mips_r2_emulator_stats
/linux-master/drivers/clk/samsung/
H A Dclk-cpu.c56 * @divs: offsets of DIV registers (ACLK, ATCLK, PCLKDBG and PERIPHCLK)
67 u32 divs[4]; member in struct:exynos_cpuclk_regs
418 .divs = { 0x1800, 0x1808, 0x180c, 0x1810 },
423 .divs = { 0x1800, 0x1808, 0x180c, 0x1810 },
529 val = readl(base + regs->divs[i]);
531 writel(val, base + regs->divs[i]);
532 wait_until_divider_stable(base + regs->divs[i], E850_BUSY_MASK);
/linux-master/drivers/clk/rockchip/
H A Dclk-cpu.c104 for (i = 0; i < ARRAY_SIZE(rate->divs); i++) {
105 const struct rockchip_cpuclk_clksel *clksel = &rate->divs[i];
H A Dclk-rk3036.c93 .divs = { \
H A Dclk-rk3188.c131 .divs = { \
170 .divs = { \
H A Dclk-rk3368.c204 .divs = { \
214 .divs = { \
H A Dclk-rk3228.c93 .divs = { \
H A Dclk-rk3128.c92 .divs = { \
H A Dclk-rk3399.c341 .divs = { \
351 .divs = { \
H A Dclk-px30.c90 .divs = { \
/linux-master/crypto/
H A Dtestmgr.c466 static unsigned int count_test_sg_divisions(const struct test_sg_division *divs) argument
472 remaining -= divs[ndivs++].proportion_of_total;
481 static bool valid_sg_divisions(const struct test_sg_division *divs, argument
488 if (divs[i].proportion_of_total <= 0 ||
489 divs[i].proportion_of_total > TEST_SG_TOTAL - total)
491 total += divs[i].proportion_of_total;
492 if (divs[i].flush_type != FLUSH_TYPE_NONE)
494 if (divs[i].nosimd)
498 memchr_inv(&divs[i], 0, (count - i) * sizeof(divs[
579 build_test_sglist(struct test_sglist *tsgl, const struct test_sg_division *divs, const unsigned int alignmask, const unsigned int total_len, struct iov_iter *data, const struct test_sg_division *out_divs[XBUFSIZE]) argument
995 generate_random_sgl_divisions(struct rnd_state *rng, struct test_sg_division *divs, size_t max_divs, char *p, char *end, bool gen_flushes, u32 req_flags) argument
1221 build_hash_sglist(struct test_sglist *tsgl, const struct hash_testvec *vec, const struct testvec_config *cfg, unsigned int alignmask, const struct test_sg_division *divs[XBUFSIZE]) argument
1279 const struct test_sg_division *divs[XBUFSIZE]; local
1463 const struct test_sg_division *divs[XBUFSIZE]; local
[all...]
/linux-master/drivers/i2c/busses/
H A Di2c-s3c2410.c812 unsigned int *div1, unsigned int *divs)
830 *divs = calc_divs;
845 unsigned int divs, div1; local
859 freq = s3c24xx_i2c_calcdivisor(clkin, target_frequency, &div1, &divs);
872 iiccon |= (divs-1);
811 s3c24xx_i2c_calcdivisor(unsigned long clkin, unsigned int wanted, unsigned int *div1, unsigned int *divs) argument
/linux-master/arch/mips/kernel/
H A Dmips-r2-to-r6-emul.c463 MIPS_R2_STATS(divs);
485 MIPS_R2_STATS(divs);
574 MIPS_R2_STATS(divs);
599 MIPS_R2_STATS(divs);
2251 seq_printf(s, "divs\t\t%ld\t%ld\n",
2252 (unsigned long)__this_cpu_read(mipsr2emustats.divs),
2253 (unsigned long)__this_cpu_read(mipsr2bdemustats.divs));
2314 __this_cpu_write((mipsr2emustats).divs, 0);
2315 __this_cpu_write((mipsr2bdemustats).divs, 0);
/linux-master/drivers/clk/qcom/
H A Ddispcc-sm8250.c1316 static struct clk_regmap_div * const divs[] = { local
1334 for (i = 0; i < ARRAY_SIZE(divs); i++) {
1335 divs[i]->reg -= 4;
1336 divs[i]->width = 4;
/linux-master/arch/m68k/ifpsp060/src/
H A Dilsp.S105 # divs.l #
195 tst.b POSNEG(%a6) # do divs, divu separately
198 # it was a divs.l, so ccode setting is a little more complicated...
/linux-master/drivers/ufs/host/
H A Dufs-exynos.c496 const int divs[] = {32, 16, 8, 4}; local
501 for (i = 0; i < ARRAY_SIZE(divs); i++) {
502 _clk = NSEC_PER_SEC * mult / (clk_period * divs[i] * div);

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