Searched refs:deferred_reg_writes (Results 1 - 4 of 4) sorted by relevance

/linux-master/drivers/gpu/drm/amd/display/dc/dpp/dcn30/
H A Ddcn30_dpp.c528 if (dpp_base->deferred_reg_writes.bits.disable_dscl) {
530 dpp_base->deferred_reg_writes.bits.disable_dscl = false;
533 if (dpp_base->deferred_reg_writes.bits.disable_gamcor) {
539 dpp_base->deferred_reg_writes.bits.disable_gamcor = false;
542 if (dpp_base->deferred_reg_writes.bits.disable_blnd_lut) {
548 dpp_base->deferred_reg_writes.bits.disable_blnd_lut = false;
551 if (dpp_base->deferred_reg_writes.bits.disable_3dlut) {
557 dpp_base->deferred_reg_writes.bits.disable_3dlut = false;
560 if (dpp_base->deferred_reg_writes.bits.disable_shaper) {
566 dpp_base->deferred_reg_writes
[all...]
H A Ddcn30_dpp_cm.c138 dpp_base->deferred_reg_writes.bits.disable_gamcor = true;
/linux-master/drivers/gpu/drm/amd/display/dc/inc/hw/
H A Ddpp.h83 union defer_reg_writes deferred_reg_writes; member in struct:dpp
/linux-master/drivers/gpu/drm/amd/display/dc/dpp/dcn10/
H A Ddcn10_dpp_dscl.c170 dpp->base.deferred_reg_writes.bits.disable_dscl = true;

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