Searched refs:ctl_status_2 (Results 1 - 1 of 1) sorted by relevance

/linux-master/arch/mips/pci/
H A Dpci-octeon.c362 union cvmx_pci_ctl_status_2 ctl_status_2; local
386 ctl_status_2.u32 = 0;
387 ctl_status_2.s.tsr_hwm = 1; /* Initializes to 0. Must be set
389 ctl_status_2.s.bar2pres = 1; /* Enable BAR2 */
390 ctl_status_2.s.bar2_enb = 1;
391 ctl_status_2.s.bar2_cax = 1; /* Don't use L2 */
392 ctl_status_2.s.bar2_esx = 1;
393 ctl_status_2.s.pmo_amod = 1; /* Round robin priority */
396 ctl_status_2.s.bb1_hole = OCTEON_PCI_BAR1_HOLE_BITS;
397 ctl_status_2
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