Searched refs:cs0 (Results 1 - 12 of 12) sorted by relevance

/linux-master/arch/hexagon/include/uapi/asm/
H A Duser.h59 /* cs0 and cs1 are only available with HEXAGON_ARCH_VERSION >= 4 */
60 unsigned long cs0; member in struct:user_regs_struct
H A Dregisters.h66 unsigned long cs0; member in struct:pt_regs::__anon280::__anon281
/linux-master/arch/hexagon/kernel/
H A Dptrace.c64 membuf_store(&to, regs->cs0);
112 INEXT(&regs->cs0, cs0);
116 ignore_offset = offsetof(struct user_regs_struct, cs0);
H A Dsignal.c54 err |= __put_user(regs->cs0, &sc->sc_regs.cs0);
84 err |= __get_user(regs->cs0, &sc->sc_regs.cs0);
H A Dvm_events.c35 printk(KERN_EMERG "cs0: \t0x%08lx cs1: 0x%08lx\n",
36 regs->cs0, regs->cs1);
H A Dkgdb.c63 { "cs0", GDB_SIZEOF_REG, offsetof(struct pt_regs, cs0)},
/linux-master/arch/hexagon/include/asm/
H A Delf.h93 DEST.cs0 = REGS->cs0;\
/linux-master/drivers/ata/
H A Dpata_octeon_cf.c56 unsigned int cs0; member in struct:octeon_cf_port
167 octeon_cf_set_boot_reg_cfg(cf_port->cs0, div);
175 reg_tim.u64 = cvmx_read_csr(CVMX_MIO_BOOT_REG_TIMX(cf_port->cs0));
204 cvmx_write_csr(CVMX_MIO_BOOT_REG_TIMX(cf_port->cs0), reg_tim.u64);
810 void __iomem *cs0; local
839 cf_port->cs0 = upper_32_bits(reg);
893 cs0 = devm_ioremap(&pdev->dev, res_cs0->start,
895 if (!cs0)
912 base = cs0 + 0x800;
920 base = cs0;
[all...]
/linux-master/drivers/isdn/mISDN/
H A Ddsp_blowfish.c470 u8 cs, cs0, cs1, cs2; local
499 cs0 = bf_crypt_inring[j++ & 15];
500 yr = (yr << 7) | (cs0 & 0x7f);
511 if ((cs & 0x7) != (((cs2 >> 5) & 4) | ((cs1 >> 6) & 2) | (cs0 >> 7))) {
/linux-master/drivers/media/dvb-frontends/
H A Dbcm3510_priv.h324 u8 cs0 :1; member in struct:bcm3510_hab_cmd_tune_ctrl_data_pair::__anon303
H A Dbcm3510.c392 c.ctl_dat[3].ctrl.cs0 = 1;
410 c.ctl_dat[7].ctrl.cs0 = 1;
/linux-master/drivers/edac/
H A Damd64_edac.c1320 int dimm, size0, size1, cs0, cs1, cs_mode; local
1325 cs0 = dimm * 2;
1330 size0 = umc_addr_mask_to_cs_size(pvt, ctrl, cs_mode, cs0);
1334 cs0, size0,

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