Searched refs:conf0 (Results 1 - 8 of 8) sorted by relevance
| /linux-master/drivers/tty/serial/ |
| H A D | esp32_uart.c | 176 u32 conf0 = esp32_uart_read(port, UART_CONF0_REG); local
178 conf0 &= ~(UART_LOOPBACK |
183 conf0 |= UART_SW_RTS;
185 conf0 |= UART_SW_DTR;
187 conf0 |= UART_LOOPBACK;
189 esp32_uart_write(port, UART_CONF0_REG, conf0);
395 u32 conf0, conf1; local
411 conf0 = esp32_uart_read(port, UART_CONF0_REG);
412 conf0 &= ~(UART_PARITY_EN | UART_PARITY | UART_BIT_NUM | UART_STOP_BIT_NUM);
418 conf0 |
[all...] |
| /linux-master/drivers/gpu/drm/bridge/synopsys/ |
| H A D | dw-hdmi-i2s-audio.c | 43 u8 conf0 = 0; local
58 conf0 = (HDMI_AUD_CONF0_I2S_SELECT | HDMI_AUD_CONF0_I2S_EN0);
63 conf0 |= HDMI_AUD_CONF0_I2S_EN3;
66 conf0 |= HDMI_AUD_CONF0_I2S_EN2;
69 conf0 |= HDMI_AUD_CONF0_I2S_EN1;
110 hdmi_write(audio, conf0, HDMI_AUD_CONF0);
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| H A D | dw-hdmi-ahb-audio.c | 406 u8 threshold, conf0, conf1, ca; local
411 conf0 = HDMI_AHB_DMA_CONF0_BURST_MODE |
419 conf0 = HDMI_AHB_DMA_CONF0_BURST_MODE |
433 conf0 |= HDMI_AHB_DMA_CONF0_EN_HLOCK;
438 writeb_relaxed(conf0, dw->data.base + HDMI_AHB_DMA_CONF0);
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| /linux-master/drivers/net/wireless/mediatek/mt76/ |
| H A D | mt76x02_eeprom.c | 93 u16 conf0 = mt76x02_eeprom_get(dev, MT_EE_NIC_CONF_0); local
96 return !(conf0 & MT_EE_NIC_CONF_0_PA_INT_5G);
98 return !(conf0 & MT_EE_NIC_CONF_0_PA_INT_2G);
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| /linux-master/drivers/pinctrl/intel/ |
| H A D | pinctrl-baytrail.c | 100 u32 conf0; member in struct:intel_pad_context
1132 u32 conf0, val; local
1156 conf0 = readl(conf_reg);
1170 switch (conf0 & BYT_PULL_ASSIGN_MASK) {
1179 switch (conf0 & BYT_PULL_STR_MASK) {
1202 conf0 & 0x7,
1203 conf0 & BYT_TRIG_NEG ? " fall" : " ",
1204 conf0 & BYT_TRIG_POS ? " rise" : " ",
1205 conf0 & BYT_TRIG_LVL ? " level" : " ");
1212 if (conf0
1370 byt_direct_irq_sanity_check(struct intel_pinctrl *vg, int pin, u32 conf0) argument
[all...] |
| /linux-master/arch/mips/include/asm/ |
| H A D | mipsmtregs.h | 183 unsigned conf0; local
188 conf0 = read_c0_mvpconf0();
189 return ((conf0 & MVPCONF0_PVPE) >> MVPCONF0_PVPE_SHIFT) + 1;
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| /linux-master/drivers/gpu/drm/mcde/ |
| H A D | mcde_display.c | 754 u32 conf0; local
763 conf0 = MCDE_DSIVID0CONF0;
772 conf0 = MCDE_DSIVID1CONF0;
781 conf0 = MCDE_DSIVID2CONF0;
824 writel(val, mcde->regs + conf0);
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| /linux-master/drivers/iio/adc/ |
| H A D | xilinx-xadc-core.c | 1320 unsigned int conf0; local
1354 ret = xadc_parse_dt(indio_dev, &conf0, irq);
1418 ret = xadc_write_adc_reg(xadc, XADC_REG_CONF0, conf0);
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