#
e2bd8c28 |
|
14-Sep-2023 |
Robert Hancock <robert.hancock@calian.com> |
iio: adc: xilinx-xadc: Correct temperature offset/scale for UltraScale The driver was previously using offset and scale values for the temperature sensor readings which were only valid for 7-series devices. Add per-device-type values for offset and scale and set them appropriately for each device type. Note that the values used for the UltraScale family are for UltraScale+ (i.e. the SYSMONE4 primitive) using the internal reference, as that seems to be the most common configuration and the device tree values Xilinx's device tree generator produces don't seem to give us anything to tell us which configuration is used. However, the differences within the UltraScale family seem fairly minor and it's closer than using the 7-series values instead in any case. Fixes: c2b7720a7905 ("iio: xilinx-xadc: Add basic support for Ultrascale System Monitor") Signed-off-by: Robert Hancock <robert.hancock@calian.com> Acked-by: O'Griofa, Conall <conall.ogriofa@amd.com> Tested-by: O'Griofa, Conall <conall.ogriofa@amd.com> Link: https://lore.kernel.org/r/20230915001019.2862964-3-robert.hancock@calian.com Cc: <Stable@vger.kernel.org> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
|
#
8d6b3ea4 |
|
14-Sep-2023 |
Robert Hancock <robert.hancock@calian.com> |
iio: adc: xilinx-xadc: Don't clobber preset voltage/temperature thresholds In the probe function, the driver was reading out the thresholds already set in the core, which can be configured by the user in the Vivado tools when the FPGA image is built. However, it later clobbered those values with zero or maximum values. In particular, the overtemperature shutdown threshold register was overwritten with the max value, which effectively prevents the FPGA from shutting down when the desired threshold was eached, potentially risking hardware damage in that case. Remove this code to leave the preconfigured default threshold values intact. The code was also disabling all alarms regardless of what enable state they were left in by the FPGA image, including the overtemperature shutdown feature. Leave these bits in their original state so they are not unconditionally disabled. Fixes: bdc8cda1d010 ("iio:adc: Add Xilinx XADC driver") Signed-off-by: Robert Hancock <robert.hancock@calian.com> Acked-by: O'Griofa, Conall <conall.ogriofa@amd.com> Tested-by: O'Griofa, Conall <conall.ogriofa@amd.com> Link: https://lore.kernel.org/r/20230915001019.2862964-2-robert.hancock@calian.com Cc: <Stable@vger.kernel.org> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
|
#
7c054b2c |
|
09-May-2023 |
James Clark <james.clark@arm.com> |
iio: adc: Use devm_krealloc_array Now that it exists, use it instead of doing the multiplication and checking for overflow manually. Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: James Clark <james.clark@arm.com> Link: https://lore.kernel.org/r/20230509094942.396150-4-james.clark@arm.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
|
#
72336966 |
|
08-Aug-2022 |
Uwe Kleine-König <u.kleine-koenig@pengutronix.de> |
iio: adc: xilinx-xadc: Benefit from devm_clk_get_enabled() to simplify Make use of devm_clk_get_enabled() to replace some code that effectively open codes this new function. Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Link: https://lore.kernel.org/r/20220808204740.307667-9-u.kleine-koenig@pengutronix.de Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
|
#
568f6869 |
|
31-May-2022 |
Andy Shevchenko <andriy.shevchenko@linux.intel.com> |
iio: adc: xilinx-xadc: Drop duplicate NULL check in xadc_parse_dt() The fwnode_for_each_child_node() is NULL-aware, no need to check its parameters outside. Drop duplicate NULL check in xadc_parse_dt(). Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20220531141118.64540-2-andriy.shevchenko@linux.intel.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
|
#
59b2947e |
|
31-May-2022 |
Andy Shevchenko <andriy.shevchenko@linux.intel.com> |
iio: adc: xilinx-xadc: Make use of device properties Convert the module to be property provider agnostic and allow it to be used on non-OF platforms. Add mod_devicetable.h include. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/20220531141118.64540-1-andriy.shevchenko@linux.intel.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
|
#
fb3e8bb4 |
|
04-Nov-2021 |
Gwendal Grignou <gwendal@chromium.org> |
iio: xilinx-xadc-core: Use local variable in xadc_read_raw Minor cleanup: bit is already defined as chan->scan_type.realbits, use bit when needed. Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Link: https://lore.kernel.org/r/20211104082413.3681212-13-gwendal@chromium.org Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
|
#
fb45c7a3 |
|
21-Oct-2021 |
Lars-Peter Clausen <lars@metafoo.de> |
iio: xilinx-xadc: Make IRQ optional In some setups the IRQ signal of the XADC might not be wired to the host system. The driver currently requires that an interrupt is specified. Make the interrupt optional so the driver can be used in such setups where the interrupt is not connected. Since both the internal triggers as well as events depend on the interrupt being connected both are not available when the interrupt is not connected. Buffered access is still supported even without an interrupt since an external trigger can be used. The IRQ is only optional when using the AXI interface, since the PCAP interface needs the IRQ for reading and writing registers. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Link: https://lore.kernel.org/r/20211021125950.28707-1-lars@metafoo.de Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
|
#
dd4efd05 |
|
17-Oct-2021 |
Lars-Peter Clausen <lars@metafoo.de> |
iio: xilinx-xadc: Remove `irq` field from state struct Since commit 2a9685d1a3b7 ("iio: adc: xilinx: use more devres helpers and remove remove()") the `irq` field from XADC driver state struct is only used in the `probe()` function. Use the local `irq` variable throughout the `probe()` function and remove the now unused field from the state struct. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Link: https://lore.kernel.org/r/20211017121551.24063-1-lars@metafoo.de Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
|
#
15ea2878 |
|
26-Apr-2021 |
Jonathan Cameron <Jonathan.Cameron@huawei.com> |
iio: core: move @id from struct iio_dev to struct iio_dev_opaque Continuing from Alexandru Ardelean's introduction of the split between driver modifiable fields and those that should only be set by the core. This could have been done in two steps to make the actual move after introducing iio_device_id() but there seemed limited point to that given how mechanical the majority of the patch is. Includes fixup from Alex for missing mxs-lradc-adc conversion. Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Reviewed-by: Alexandru Ardelean <ardeleanalex@gmail.com> Link: https://lore.kernel.org/r/20210426174911.397061-2-jic23@kernel.org
|
#
86073fa2 |
|
09-Mar-2021 |
Gwendal Grignou <gwendal@chromium.org> |
iio: xilinx-xadc: Remove code to set trigger parent iio_trigger_set_drvdata() sets the trigger device parent to first argument of viio_trigger_alloc(), no need to do it again in the driver code. In xadc_alloc_trigger, given dev is indio_dev->dev.parent, and we call devm_iio_trigger_alloc wit dev as argument, we do not have to set data->trig->dev.parent to indio_dev->dev.parent anymore. Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Link: https://lore.kernel.org/r/20210309193620.2176163-9-gwendal@chromium.org Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
|
#
2a9685d1 |
|
30-Nov-2020 |
Bartosz Golaszewski <bgolaszewski@baylibre.com> |
iio: adc: xilinx: use more devres helpers and remove remove() In order to simplify resource management and error paths in probe() and entirely drop the remove() callback - use devres helpers wherever possible. Define devm actions for cancelling the delayed work and disabling the clock. Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> Tested-by: Anand Ashok Dumbre <anandash@xilinx.com> Reviewed-by: Anand Ashok Dumbre <anandash@xilinx.com> Link: https://lore.kernel.org/r/20201130142759.28216-4-brgl@bgdev.pl Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
|
#
eab64715 |
|
30-Nov-2020 |
Bartosz Golaszewski <bgolaszewski@baylibre.com> |
iio: adc: xilinx: use devm_krealloc() instead of kfree() + kcalloc() We now have devm_krealloc() in the kernel Use it indstead of calling kfree() and kcalloc() separately. Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> Tested-by: Anand Ashok Dumbre <anandash@xilinx.com> Reviewed-by: Anand Ashok Dumbre <anandash@xilinx.com> Link: https://lore.kernel.org/r/20201130142759.28216-3-brgl@bgdev.pl Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
|
#
9d8fd2a0 |
|
30-Nov-2020 |
Bartosz Golaszewski <bgolaszewski@baylibre.com> |
iio: adc: xilinx: use helper variable for &pdev->dev It's more elegant to use a helper local variable to store the address of the underlying struct device than to dereference pdev everywhere. Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> Tested-by: Anand Ashok Dumbre <anandash@xilinx.com> Reviewed-by: Anand Ashok Dumbre <anandash@xilinx.com> Link: https://lore.kernel.org/r/20201130142759.28216-2-brgl@bgdev.pl Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
|
#
c2b7720a |
|
22-Sep-2020 |
Lars-Peter Clausen <lars@metafoo.de> |
iio: xilinx-xadc: Add basic support for Ultrascale System Monitor The xilinx-xadc IIO driver currently has support for the XADC in the Xilinx 7 series FPGAs. The system-monitor is the equivalent to the XADC in the Xilinx UltraScale and UltraScale+ FPGAs. The IP designers did a good job at maintaining backwards compatibility and only minor changes are required to add basic support for the system-monitor core. The non backwards compatible changes are: * Register map offset was moved from 0x200 to 0x400 * Only one ADC compared to two in the XADC * 10 bit ADC instead of 12 bit ADC * Two of the channels monitor different supplies Add the necessary logic to accommodate these changes to support the system-monitor in the XADC driver. Note that this patch does not include support for some new features found in the system-monitor like additional alarms, user supply monitoring and secondary system-monitor access. This might be added at a later time. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Tested-by: Anand Ashok Dumbre <anandash@xilinx.com> Reviewed-by: Anand Ashok Dumbre <anandash@xilinx.com> Link: https://lore.kernel.org/r/20200922134624.13191-2-lars@metafoo.de Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
|
#
750628c7 |
|
24-Aug-2020 |
Bartosz Golaszewski <bgolaszewski@baylibre.com> |
iio: adc: xilinx-xadc: use devm_krealloc() Use the managed variant of krealloc() and shrink the code a bit. Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> Acked-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Link: https://lore.kernel.org/r/20200824173859.4910-4-brgl@bgdev.pl Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
|
#
f11d59d8 |
|
25-May-2020 |
Lars-Peter Clausen <lars@metafoo.de> |
iio: Move attach/detach of the poll func to the core All devices using a triggered buffer need to attach and detach the trigger to the device in order to properly work. Instead of doing this in each and every driver by hand move this into the core. At this point in time, all drivers should have been resolved to attach/detach the poll-function in the same order. This patch removes all explicit calls of iio_triggered_buffer_postenable() & iio_triggered_buffer_predisable() in all drivers, since the core handles now the pollfunc attach/detach. The more peculiar change is for the 'at91-sama5d2_adc' driver, since it's not immediately obvious that removing the hooks doesn't break anything. Eugen was able to test on at91-sama5d2-adc driver, sama5d2-xplained board. All seems to be fine. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Signed-off-by: Alexandru Ardelean <alexandru.ardelean@analog.com> Tested-by: Eugen Hristev <eugen.hristev@microchip.com> #for at91-sama5d2-adc Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
|
#
8cb631cc |
|
13-Jun-2020 |
Lars-Peter Clausen <lars@metafoo.de> |
iio: Remove superfluous of_node assignments If a driver does not assign an of_node to a IIO device to IIO core will automatically assign the of_node of the parent device. This automatic assignment is done in the iio_device_register() function. There is a fair amount of drivers that currently manually assign the of_node of the IIO device. All but 4 of them can make use of the automatic assignment though. The exceptions are: * mxs-lradc-adc: Which uses the of_node of the parent of the parent. * stm32-dfsdm-adc, stm32-adc and stm32-dac: Which reference the of_node assigned to the IIO device before iio_device_register() is called. All other drivers are updated to use automatic assignment. This reduces the amount of boilerplate code involved in setting up the IIO device. The patch has mostly been auto-generated with the following semantic patch // <smpl> @exists@ expression indio_dev; expression parent; @@ indio_dev = \(devm_iio_device_alloc\|iio_device_alloc\)(&parent, ...) ... -indio_dev->dev.of_node = parent.of_node; @exists@ expression indio_dev; expression parent; @@ indio_dev = \(devm_iio_device_alloc\|iio_device_alloc\)(parent, ...) ... -indio_dev->dev.of_node = parent->of_node; // </smpl> Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
|
#
d3be8324 |
|
22-May-2020 |
Alexandru Ardelean <alexandru.ardelean@analog.com> |
iio: remove explicit IIO device parent assignment This patch applies the semantic patch: @@ expression I, P, SP; @@ I = devm_iio_device_alloc(P, SP); ... - I->dev.parent = P; It updates 302 files and does 307 deletions. This semantic patch also removes some comments like '/* Establish that the iio_dev is a child of the i2c device */' But this is is only done in case where the block is left empty. The patch does not seem to cover all cases. It looks like in some cases a different variable is used in some cases to assign the parent, but it points to the same reference. In other cases, the block covered by ... may be just too big to be covered by the semantic patch. However, this looks pretty good as well, as it does cover a big bulk of the drivers that should remove the parent assignment. Signed-off-by: Alexandru Ardelean <alexandru.ardelean@analog.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
|
#
3b7f9dbb |
|
03-Apr-2020 |
Lars-Peter Clausen <lars@metafoo.de> |
iio: xilinx-xadc: Make sure not exceed maximum samplerate The XADC supports a samplerate of up to 1MSPS. Unfortunately the hardware does not have a FIFO, which means it generates an interrupt for each conversion sequence. At one 1MSPS this creates an interrupt storm that causes the system to soft-lock. For this reason the driver limits the maximum samplerate to 150kSPS. Currently this check is only done when setting a new samplerate. But it is also possible that the initial samplerate configured in the FPGA bitstream exceeds the limit. In this case when starting to capture data without first changing the samplerate the system can overload. To prevent this check the currently configured samplerate in the probe function and reduce it to the maximum if necessary. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Fixes: bdc8cda1d010 ("iio:adc: Add Xilinx XADC driver") Cc: <Stable@vger.kernel.org> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
|
#
8bef455c |
|
03-Apr-2020 |
Lars-Peter Clausen <lars@metafoo.de> |
iio: xilinx-xadc: Fix sequencer configuration for aux channels in simultaneous mode The XADC has two internal ADCs. Depending on the mode it is operating in either one or both of them are used. The device manual calls this continuous (one ADC) and simultaneous (both ADCs) mode. The meaning of the sequencing register for the aux channels changes depending on the mode. In continuous mode each bit corresponds to one of the 16 aux channels. And the single ADC will convert them one by one in order. In simultaneous mode the aux channels are split into two groups the first 8 channels are assigned to the first ADC and the other 8 channels to the second ADC. The upper 8 bits of the sequencing register are unused and the lower 8 bits control both ADCs. This means a bit needs to be set if either the corresponding channel from the first group or the second group (or both) are set. Currently the driver does not have the special handling required for simultaneous mode. Add it. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Fixes: bdc8cda1d010 ("iio:adc: Add Xilinx XADC driver") Cc: <Stable@vger.kernel.org> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
|
#
f954b098 |
|
03-Apr-2020 |
Lars-Peter Clausen <lars@metafoo.de> |
iio: xilinx-xadc: Fix clearing interrupt when enabling trigger When enabling the trigger and unmasking the end-of-sequence (EOS) interrupt the EOS interrupt should be cleared from the status register. Otherwise it is possible that it was still set from a previous capture. If that is the case the interrupt would fire immediately even though no conversion has been done yet and stale data is being read from the device. The old code only clears the interrupt if the interrupt was previously unmasked. Which does not make much sense since the interrupt is always masked at this point and in addition masking the interrupt does not clear the interrupt from the status register. So the clearing needs to be done unconditionally. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Fixes: bdc8cda1d010 ("iio:adc: Add Xilinx XADC driver") Cc: <Stable@vger.kernel.org> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
|
#
e44ec779 |
|
03-Apr-2020 |
Lars-Peter Clausen <lars@metafoo.de> |
iio: xilinx-xadc: Fix ADC-B powerdown The check for shutting down the second ADC is inverted. This causes it to be powered down when it should be enabled. As a result channels that are supposed to be handled by the second ADC return invalid conversion results. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Fixes: bdc8cda1d010 ("iio:adc: Add Xilinx XADC driver") Cc: <Stable@vger.kernel.org> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
|
#
903b6a07 |
|
03-Apr-2020 |
Lars-Peter Clausen <lars@metafoo.de> |
iio: xilinx-xadc: Fix typo Fix a typo. 'at the a time' -> 'at a time'. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
|
#
2dbbe4d5 |
|
09-Mar-2020 |
Lars-Peter Clausen <lars@metafoo.de> |
iio: xilinx-xadc: Fix typo in author's name It appears the author of the xilinx-xadc driver can't even spell his own name correctly. Fix that. Reported-by: Lars Möllendorf <lars.moellendorf@plating.de> Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
|
#
d26c9abe |
|
13-Oct-2019 |
Jonathan Cameron <Jonathan.Cameron@huawei.com> |
iio: adc: xilinx-xadc: use devm_platform_ioremap_resource Reduces local boilerplate. Suggested by coccinelle. CHECK drivers/iio/adc/xilinx-xadc-core.c drivers/iio/adc/xilinx-xadc-core.c:1184:1-11: WARNING: Use devm_platform_ioremap_resource for xadc -> base Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Cc: Manish Narani <manish.narani@xilinx.com> Reviewed-by: Sven Van Asbroeck <TheSven73@gmail.com>
|
#
fda8d26e |
|
28-May-2019 |
Thomas Gleixner <tglx@linutronix.de> |
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 177 Based on 1 normalized pattern(s): licensed under the gpl 2 extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 135 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Allison Randal <allison@lohutok.net> Reviewed-by: Richard Fontana <rfontana@redhat.com> Reviewed-by: Alexios Zavras <alexios.zavras@intel.com> Reviewed-by: Steve Winslow <swinslow@gmail.com> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190528170026.071193225@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
|
#
2e4b88f7 |
|
10-Mar-2019 |
Sven Van Asbroeck <thesven73@gmail.com> |
iio: adc: xilinx: prevent touching unclocked h/w on remove In remove, the clock is disabled before canceling the delayed work. This means that the delayed work may be touching unclocked hardware. Fix by disabling the clock after the delayed work is fully canceled. This is consistent with the probe error path order. Signed-off-by: Sven Van Asbroeck <TheSven73@gmail.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
|
#
862e4644 |
|
10-Mar-2019 |
Sven Van Asbroeck <thesven73@gmail.com> |
iio: adc: xilinx: fix potential use-after-free on probe If probe errors out after request_irq(), its error path does not explicitly cancel the delayed work, which may have been scheduled by the interrupt handler. This means the delayed work may still be running when the core frees the private structure (struct xadc). This is a potential use-after-free. Fix by inserting cancel_delayed_work_sync() in the probe error path. Signed-off-by: Sven Van Asbroeck <TheSven73@gmail.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
|
#
62039b6a |
|
10-Mar-2019 |
Sven Van Asbroeck <thesven73@gmail.com> |
iio: adc: xilinx: fix potential use-after-free on remove When cancel_delayed_work() returns, the delayed work may still be running. This means that the core could potentially free the private structure (struct xadc) while the delayed work is still using it. This is a potential use-after-free. Fix by calling cancel_delayed_work_sync(), which waits for any residual work to finish before returning. Signed-off-by: Sven Van Asbroeck <TheSven73@gmail.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
|
#
7fc93f32 |
|
27-Dec-2018 |
Aditya Pakki <pakki001@umn.edu> |
iio: adc: xilinx: check return value of xadc_write_adc_reg In function xadc_probe, xadc_write_adc_reg can return an error value when write fails. The fix checks for the return value consistent with other invocations of the latter function. Signed-off-by: Aditya Pakki <pakki001@umn.edu> Reviewed-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
|
#
2fa03b92 |
|
23-Jul-2018 |
Manish Narani <manish.narani@xilinx.com> |
iio: adc: xilinx: Move request_irq before enabling interrupts Enabling the Interrupts before registering the irq handler is a bad idea. This patch corrects the same for XADC driver. Signed-off-by: Manish Narani <manish.narani@xilinx.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
|
#
50e8e9f3 |
|
23-Jul-2018 |
Manish Narani <manish.narani@xilinx.com> |
iio: adc: xilinx: Remove platform_get_irq from xadc_remove function This patch avoids getting irq number in xadc_remove function. Instead store 'irq' in xadc struct and use xadc->irq wherever needed. This patch also resolves a warning reported by coverity where it asks to check return value of platform_get_irq() for any errors in xadc_remove. Signed-off-by: Manish Narani <manish.narani@xilinx.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
|
#
81f54718 |
|
23-Jul-2018 |
Manish Narani <manish.narani@xilinx.com> |
iio: adc: xilinx: limit pcap clock frequency value This patch limits the xadc pcap clock frequency value to be less than 200MHz. This fixes the issue when zynq is booted at higher frequency values, pcap crosses the maximum limit of 200MHz(Fmax) as it is derived from IOPLL. If this limit is crossed it is required to alter the WEDGE and REDGE bits of XADC_CFG register to make timings better in the interface. So to avoid alteration of these bits every time, the pcap value should not cross the Fmax limit. Signed-off-by: Manish Narani <manish.narani@xilinx.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
|
#
0a846096 |
|
23-Jul-2018 |
Manish Narani <manish.narani@xilinx.com> |
iio: adc: xilinx: Check for return values in clk related functions This patch adds check for return values from clock related functions. This was reported by static code analysis tool. Signed-off-by: Manish Narani <manish.narani@xilinx.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
|
#
c344a327 |
|
18-Jul-2018 |
Manish Narani <manish.narani@xilinx.com> |
iio: adc: xilinx: Remove dead code from xadc_zynq_setup This patch removes dead code from xadc_zynq_setup. The condition "if (tck_rate > XADC_ZYNQ_TCK_RATE_MAX)" cannot be true at any point of time. There is also an incompatible parameter used in the code. This patch fixes the same reported by coverity. Signed-off-by: Manish Narani <manish.narani@xilinx.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
|
#
52b31bcc |
|
23-Jul-2017 |
Jonathan Cameron <jic23@kernel.org> |
iio:adc: drop assign iio_info.driver_module and iio_trigger_ops.owner The equivalent of both of these are now done via macro magic when the relevant register calls are made. The actual structure elements will shortly go away. Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Reviewed-by: Lars-Peter Clausen <lars@metafoo.de>
|
#
0a178fd7 |
|
25-May-2017 |
Arvind Yadav <arvind.yadav.cs@gmail.com> |
iio: adc: xilinx: Handle return value of clk_prepare_enable clk_prepare_enable() can fail here and we must check its return value. Signed-off-by: Arvind Yadav <arvind.yadav.cs@gmail.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
|
#
ca1c39ef |
|
20-Feb-2017 |
Christophe JAILLET <christophe.jaillet@wanadoo.fr> |
iio: adc: xilinx: Fix error handling Reorder error handling labels in order to match the way resources have been allocated. Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr> Acked-by: Lars-Peter Clausen <lars@metafoo.de> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
|
#
cef7e125 |
|
15-Nov-2015 |
Julia Lawall <Julia.Lawall@lip6.fr> |
iio: adc: xilinx: constify iio_buffer_setup_ops structure The iio_buffer_setup_ops structures are never modified, so declare this one as const, like the others. Done with the help of Coccinelle. Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr> Acked-by: Lars-Peter Clausen <lars@metafoo.de> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
|
#
a57f8dac |
|
11-Nov-2015 |
Thomas Betker <thomas.betker@rohde-schwarz.com> |
iio: adc: xilinx: Fix VREFN scale The scaling factor for VREFN is 3.0/4096 (not 1.0/4096), just as for VREFP. This is not immediately obvious from the specification (Xilinx UG480), but has been confirmed by Xilinx support. Suggested-by: Hartmut Knaack <knaack.h@gmx.de> Signed-off-by: Thomas Betker <thomas.betker@rohde-schwarz.com> Cc: <Stable@vger.kernel.org> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
|
#
70581e0e |
|
11-Aug-2015 |
Xander Huff <xander.huff@ni.com> |
iio: adc: xilinx-xadc: Push interrupts into hardirq context The driver currently registers a pair of irq handlers using request_threaded_irq(), however the synchronization mechanism between the hardirq and the threadedirq handler is a regular spinlock. Unfortunately, this breaks PREEMPT_RT builds, where a spinlock can sleep, and is thus not able to be acquired from a hardirq handler. This patch gets rid of the threaded handler and pushes all interrupt handling into the hardirq context, and uses request_irq(). To validate that this change has no impact on RT performance, here are cyclictest values with no processes running: $ sudo cyclictest -S -m -p 98 policy: fifo: loadavg: 0.00 0.01 0.05 1/174 2539 T: 0 ( 1405) P:98 I:1000 C:167010520 Min: 9 Act: 12 Avg: 12 Max: 75 T: 1 ( 1862) P:98 I:1500 C:111340339 Min: 9 Act: 12 Avg: 12 Max: 73 Then, all xadc raw handles were accessed in a continuous loop via /sys/bus/iio/devices/iio:device0: $ sudo cyclictest -S -m -p 98 policy: fifo: loadavg: 7.84 7.70 7.63 3/182 4260 T: 0 ( 2559) P:98 I:1000 C:241557018 Min: 11 Act: 18 Avg: 21 Max: 74 T: 1 ( 2560) P:98 I:1500 C:161038006 Min: 10 Act: 21 Avg: 20 Max: 73 Signed-off-by: Xander Huff <xander.huff@ni.com> Acked-by: Lars-Peter Clausen <lars@metafoo.de> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
|
#
97ffae1d |
|
15-Apr-2015 |
Thomas Betker <thomas.betker@rohde-schwarz.com> |
iio: adc: xilinx: Fix VREFN sign The VREFN channel is bipolar, not unipolar. Small negative values do occur (e.g., -1mV), and unsigned conversion maps them incorrectly to large positive values (about +1V), so fix this. Signed-off-by: Thomas Betker <thomas.betker@rohde-schwarz.com> Cc: <Stable@vger.kernel.org> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
|
#
00db4e52 |
|
15-Apr-2015 |
Thomas Betker <thomas.betker@rohde-schwarz.com> |
iio: adc: xilinx: Fix VREFP scale The scaling factor for VREFP is 3.0/4096, not 1.0/4096; fix this to get correct readings. Signed-off-by: Thomas Betker <thomas.betker@rohde-schwarz.com> Cc: <stable@vger.kernel.org> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
|
#
d6c96c42 |
|
15-Apr-2015 |
Thomas Betker <thomas.betker@rohde-schwarz.com> |
iio: adc: xilinx: Fix "vccaux" channel .address For the "vccaux" channel, read the VCCAUX register, not VCCINT. Signed-off-by: Thomas Betker <thomas.betker@rohde-schwarz.com> Cc: <stable@vger.kernel.org> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
|
#
1887e724 |
|
09-Nov-2014 |
Subbaraya Sundeep Bhatta <subbaraya.sundeep.bhatta@xilinx.com> |
iio: adc: xilinx-xadc: assign auxiliary channels address correctly This patch fixes incorrect logic for assigning address to auxiliary channels of xilinx xadc. Signed-off-by: Subbaraya Sundeep Bhatta <sbhatta@xilinx.com> Acked-by: Lars-Peter Clausen <lars@metafoo.de> Cc: Stable@vger.kernel.org Signed-off-by: Jonathan Cameron <jic23@kernel.org>
|
#
ff9e7621 |
|
13-Aug-2014 |
Michal Simek <michal.simek@xilinx.com> |
iio: adc: xilinx: Remove .owner field for driver There is no need to init .owner field. Based on the patch from Peter Griffin <peter.griffin@linaro.org> "mmc: remove .owner field for drivers using module_platform_driver" This patch removes the superflous .owner field for drivers which use the module_platform_driver API, as this is overriden in platform_driver_register anyway." Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
|
#
889c5580 |
|
08-Jun-2014 |
Julia Lawall <Julia.Lawall@lip6.fr> |
iio: fix error return code Convert a zero return value on error to a negative one, as returned elsewhere in the function. A simplified version of the semantic match that finds this problem is as follows: (http://coccinelle.lip6.fr/) // <smpl> ( if@p1 (\(ret < 0\|ret != 0\)) { ... return ret; } | ret@p1 = 0 ) ... when != ret = e1 when != &ret *if(...) { ... when != ret = e2 when forall return ret; } // </smpl> Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
|
#
398fd22b |
|
05-Dec-2014 |
Peter Meerwald <pmeerw@pmeerw.net> |
iio: Remove timestamp argument from iio_trigger_poll() and iio_trigger_poll_chained() argument has been ignored; adjust drivers accordingly Signed-off-by: Peter Meerwald <pmeerw@pmeerw.net> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
|
#
bdc8cda1 |
|
17-Feb-2014 |
Lars-Peter Clausen <lars@metafoo.de> |
iio:adc: Add Xilinx XADC driver The Xilinx XADC is a ADC that can be found in the series 7 FPGAs from Xilinx. The XADC has a DRP interface for communication. Currently two different frontends for the DRP interface exist. One that is only available on the ZYNQ family as a hardmacro in the SoC portion of the ZYNQ. The other one is available on all series 7 platforms and is a softmacro with a AXI interface. This driver supports both interfaces and internally has a small abstraction layer that hides the specifics of these interfaces from the main driver logic. The ADC has a couple of internal channels which are used for voltage and temperature monitoring of the FPGA as well as one primary and up to 16 channels auxiliary channels for measuring external voltages. The external auxiliary channels can either be directly connected each to one physical pin on the FPGA or they can make use of an external multiplexer which is responsible for multiplexing the external signals onto one pair of physical pins. The voltage and temperature monitoring channels also have an event capability which allows to generate a interrupt when their value falls below or raises above a set threshold. Buffered sampling mode is supported by the driver, but only for AXI-XADC since the ZYNQ XADC interface does not have capabilities for supporting buffer mode (no end-of-conversion interrupt). If buffered mode is supported the driver will register two triggers. One "xadc-samplerate" trigger which will generate samples with the configured samplerate. And one "xadc-convst" trigger which will generate one sample each time the CONVST (conversion start) signal is asserted. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
|