/linux-master/drivers/gpu/drm/mediatek/ |
H A D | mtk_disp_drv.h | 19 unsigned int bpc, struct cmdq_pkt *cmdq_pkt); 30 unsigned int bpc, struct cmdq_pkt *cmdq_pkt); 39 unsigned int bpc, struct cmdq_pkt *cmdq_pkt); 44 unsigned int dither_en, struct cmdq_pkt *cmdq_pkt); 58 unsigned int bpc, struct cmdq_pkt *cmdq_pkt); [all...] |
H A D | mtk_ethdr.h | 15 unsigned int bpc, struct cmdq_pkt *cmdq_pkt); 18 struct cmdq_pkt *cmdq_pkt);
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H A D | mtk_disp_merge.c | 83 void mtk_merge_start_cmdq(struct device *dev, struct cmdq_pkt *cmdq_pkt) argument 88 mtk_ddp_write(cmdq_pkt, 0x0, &priv->cmdq_reg, priv->regs, 91 mtk_ddp_write(cmdq_pkt, 1, &priv->cmdq_reg, priv->regs, 95 void mtk_merge_stop_cmdq(struct device *dev, struct cmdq_pkt *cmdq_pkt) argument 100 mtk_ddp_write(cmdq_pkt, 0x1, &priv->cmdq_reg, priv->regs, 103 mtk_ddp_write(cmdq_pkt, 0, &priv->cmdq_reg, priv->regs, 106 if (!cmdq_pkt && priv->async_clk) 111 struct cmdq_pkt *cmdq_pk 110 mtk_merge_fifo_setting(struct mtk_disp_merge *priv, struct cmdq_pkt *cmdq_pkt) argument 129 mtk_merge_config(struct device *dev, unsigned int w, unsigned int h, unsigned int vrefresh, unsigned int bpc, struct cmdq_pkt *cmdq_pkt) argument 136 mtk_merge_advance_config(struct device *dev, unsigned int l_w, unsigned int r_w, unsigned int h, unsigned int vrefresh, unsigned int bpc, struct cmdq_pkt *cmdq_pkt) argument [all...] |
H A D | mtk_mdp_rdma.c | 149 static void mtk_mdp_rdma_fifo_config(struct device *dev, struct cmdq_pkt *cmdq_pkt) argument 153 mtk_ddp_write_mask(cmdq_pkt, FLD_EXT_ULTRA_EN | VAL_PRE_ULTRA_EN_ENABLE << 16 | 161 void mtk_mdp_rdma_start(struct device *dev, struct cmdq_pkt *cmdq_pkt) argument 165 mtk_ddp_write_mask(cmdq_pkt, FLD_ROT_ENABLE, &priv->cmdq_reg, 169 void mtk_mdp_rdma_stop(struct device *dev, struct cmdq_pkt *cmdq_pkt) argument 173 mtk_ddp_write_mask(cmdq_pkt, 0, &priv->cmdq_reg, 175 mtk_ddp_write(cmdq_pkt, 179 mtk_mdp_rdma_config(struct device *dev, struct mtk_mdp_rdma_cfg *cfg, struct cmdq_pkt *cmdq_pkt) argument [all...] |
H A D | mtk_drm_ddp_comp.c | 69 void mtk_ddp_write(struct cmdq_pkt *cmdq_pkt, unsigned int value, argument 74 if (cmdq_pkt) 75 cmdq_pkt_write(cmdq_pkt, cmdq_reg->subsys, 82 void mtk_ddp_write_relaxed(struct cmdq_pkt *cmdq_pkt, unsigned int value, argument 87 if (cmdq_pkt) 88 cmdq_pkt_write(cmdq_pkt, cmdq_reg->subsys, 95 void mtk_ddp_write_mask(struct cmdq_pkt *cmdq_pkt, unsigne argument 128 mtk_dither_set_common(void __iomem *regs, struct cmdq_client_reg *cmdq_reg, unsigned int bpc, unsigned int cfg, unsigned int dither_en, struct cmdq_pkt *cmdq_pkt) argument 154 mtk_dither_config(struct device *dev, unsigned int w, unsigned int h, unsigned int vrefresh, unsigned int bpc, struct cmdq_pkt *cmdq_pkt) argument 181 mtk_dither_set(struct device *dev, unsigned int bpc, unsigned int cfg, struct cmdq_pkt *cmdq_pkt) argument 190 mtk_dsc_config(struct device *dev, unsigned int w, unsigned int h, unsigned int vrefresh, unsigned int bpc, struct cmdq_pkt *cmdq_pkt) argument 220 mtk_od_config(struct device *dev, unsigned int w, unsigned int h, unsigned int vrefresh, unsigned int bpc, struct cmdq_pkt *cmdq_pkt) argument 238 mtk_postmask_config(struct device *dev, unsigned int w, unsigned int h, unsigned int vrefresh, unsigned int bpc, struct cmdq_pkt *cmdq_pkt) argument [all...] |
H A D | mtk_ethdr.c | 149 struct cmdq_pkt *cmdq_pkt) 164 mtk_ddp_write(cmdq_pkt, 0, &mixer->cmdq_base, mixer->regs, MIX_L_SRC_SIZE(idx)); 174 MIXER_INX_MODE_BYPASS, align_width / 2 - 1, cmdq_pkt); 176 mtk_ddp_write(cmdq_pkt, pending->height << 16 | align_width, &mixer->cmdq_base, 178 mtk_ddp_write(cmdq_pkt, offset, &mixer->cmdq_base, mixer->regs, MIX_L_SRC_OFFSET(idx)); 179 mtk_ddp_write_mask(cmdq_pkt, alpha_con, &mixer->cmdq_base, mixer->regs, MIX_L_SRC_CON(idx), 181 mtk_ddp_write_mask(cmdq_pkt, BIT(idx), &mixer->cmdq_base, mixer->regs, MIX_SRC_CON, 187 unsigned int bpc, struct cmdq_pkt *cmdq_pkt) 147 mtk_ethdr_layer_config(struct device *dev, unsigned int idx, struct mtk_plane_state *state, struct cmdq_pkt *cmdq_pkt) argument 185 mtk_ethdr_config(struct device *dev, unsigned int w, unsigned int h, unsigned int vrefresh, unsigned int bpc, struct cmdq_pkt *cmdq_pkt) argument [all...] |
H A D | mtk_disp_ovl.c | 235 static void mtk_ovl_set_afbc(struct mtk_disp_ovl *ovl, struct cmdq_pkt *cmdq_pkt, argument 238 mtk_ddp_write_mask(cmdq_pkt, enabled ? OVL_LAYER_AFBC_EN(idx) : 0, 244 struct cmdq_pkt *cmdq_pkt) 263 mtk_ddp_write(cmdq_pkt, reg, &ovl->cmdq_reg, 269 unsigned int bpc, struct cmdq_pkt *cmdq_pkt) 274 mtk_ddp_write_relaxed(cmdq_pkt, h << 16 | w, &ovl->cmdq_reg, ovl->regs, 276 mtk_ddp_write_relaxed(cmdq_pkt, 243 mtk_ovl_set_bit_depth(struct device *dev, int idx, u32 format, struct cmdq_pkt *cmdq_pkt) argument 267 mtk_ovl_config(struct device *dev, unsigned int w, unsigned int h, unsigned int vrefresh, unsigned int bpc, struct cmdq_pkt *cmdq_pkt) argument 323 mtk_ovl_layer_on(struct device *dev, unsigned int idx, struct cmdq_pkt *cmdq_pkt) argument 348 mtk_ovl_layer_off(struct device *dev, unsigned int idx, struct cmdq_pkt *cmdq_pkt) argument 397 mtk_ovl_layer_config(struct device *dev, unsigned int idx, struct mtk_plane_state *state, struct cmdq_pkt *cmdq_pkt) argument [all...] |
H A D | mtk_disp_ccorr.c | 59 unsigned int bpc, struct cmdq_pkt *cmdq_pkt) 63 mtk_ddp_write(cmdq_pkt, w << 16 | h, &ccorr->cmdq_reg, ccorr->regs, 65 mtk_ddp_write(cmdq_pkt, CCORR_ENGINE_EN, &ccorr->cmdq_reg, ccorr->regs, 112 struct cmdq_pkt *cmdq_pkt = NULL; local 124 mtk_ddp_write(cmdq_pkt, coeffs[0] << 16 | coeffs[1], 126 mtk_ddp_write(cmdq_pkt, coeffs[2] << 16 | coeffs[3], 128 mtk_ddp_write(cmdq_pkt, coeffs[4] << 16 | coeffs[5], 130 mtk_ddp_write(cmdq_pkt, coeff 57 mtk_ccorr_config(struct device *dev, unsigned int w, unsigned int h, unsigned int vrefresh, unsigned int bpc, struct cmdq_pkt *cmdq_pkt) argument [all...] |
H A D | mtk_drm_ddp_comp.h | 50 struct cmdq_pkt; 58 unsigned int bpc, struct cmdq_pkt *cmdq_pkt); 74 struct cmdq_pkt *cmdq_pkt); 144 struct cmdq_pkt *cmdq_pkt) 147 comp->funcs->config(comp->dev, w, h, vrefresh, bpc, cmdq_pkt); 218 struct cmdq_pkt *cmdq_pkt) 141 mtk_ddp_comp_config(struct mtk_ddp_comp *comp, unsigned int w, unsigned int h, unsigned int vrefresh, unsigned int bpc, struct cmdq_pkt *cmdq_pkt) argument 215 mtk_ddp_comp_layer_config(struct mtk_ddp_comp *comp, unsigned int idx, struct mtk_plane_state *state, struct cmdq_pkt *cmdq_pkt) argument [all...] |
H A D | mtk_disp_rdma.c | 186 unsigned int bpc, struct cmdq_pkt *cmdq_pkt) 193 mtk_ddp_write_mask(cmdq_pkt, width, &rdma->cmdq_reg, rdma->regs, 195 mtk_ddp_write_mask(cmdq_pkt, height, &rdma->cmdq_reg, rdma->regs, 213 mtk_ddp_write(cmdq_pkt, reg, &rdma->cmdq_reg, rdma->regs, DISP_REG_RDMA_FIFO_CON); 260 struct cmdq_pkt *cmdq_pkt) 270 mtk_ddp_write_relaxed(cmdq_pkt, con, &rdma->cmdq_reg, rdma->regs, DISP_RDMA_MEM_CON); 273 mtk_ddp_write_mask(cmdq_pkt, RDMA_MATRIX_ENABLE, &rdma->cmdq_reg, rdma->regs, 276 mtk_ddp_write_mask(cmdq_pkt, RDMA_MATRIX_INT_MTX_BT601_to_RG 184 mtk_rdma_config(struct device *dev, unsigned int width, unsigned int height, unsigned int vrefresh, unsigned int bpc, struct cmdq_pkt *cmdq_pkt) argument 258 mtk_rdma_layer_config(struct device *dev, unsigned int idx, struct mtk_plane_state *state, struct cmdq_pkt *cmdq_pkt) argument [all...] |
H A D | mtk_disp_ovl_adaptor.c | 135 struct cmdq_pkt *cmdq_pkt) 162 mtk_merge_stop_cmdq(merge, cmdq_pkt); 163 mtk_mdp_rdma_stop(rdma_l, cmdq_pkt); 164 mtk_mdp_rdma_stop(rdma_r, cmdq_pkt); 165 mtk_ethdr_layer_config(ethdr, idx, state, cmdq_pkt); 181 mtk_merge_advance_config(merge, l_w, r_w, pending->height, 0, 0, cmdq_pkt); 183 pending->height, cmdq_pkt); 191 mtk_mdp_rdma_config(rdma_l, &rdma_config, cmdq_pkt); 196 mtk_mdp_rdma_config(rdma_r, &rdma_config, cmdq_pkt); 133 mtk_ovl_adaptor_layer_config(struct device *dev, unsigned int idx, struct mtk_plane_state *state, struct cmdq_pkt *cmdq_pkt) argument 210 mtk_ovl_adaptor_config(struct device *dev, unsigned int w, unsigned int h, unsigned int vrefresh, unsigned int bpc, struct cmdq_pkt *cmdq_pkt) argument [all...] |
H A D | mtk_disp_color.c | 62 unsigned int bpc, struct cmdq_pkt *cmdq_pkt) 66 mtk_ddp_write(cmdq_pkt, w, &color->cmdq_reg, color->regs, DISP_COLOR_WIDTH(color)); 67 mtk_ddp_write(cmdq_pkt, h, &color->cmdq_reg, color->regs, DISP_COLOR_HEIGHT(color)); 60 mtk_color_config(struct device *dev, unsigned int w, unsigned int h, unsigned int vrefresh, unsigned int bpc, struct cmdq_pkt *cmdq_pkt) argument
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H A D | mtk_disp_aal.c | 69 unsigned int bpc, struct cmdq_pkt *cmdq_pkt) 77 mtk_ddp_write(cmdq_pkt, sz, &aal->cmdq_reg, aal->regs, DISP_AAL_SIZE); 78 mtk_ddp_write(cmdq_pkt, sz, &aal->cmdq_reg, aal->regs, DISP_AAL_OUTPUT_SIZE); 67 mtk_aal_config(struct device *dev, unsigned int w, unsigned int h, unsigned int vrefresh, unsigned int bpc, struct cmdq_pkt *cmdq_pkt) argument
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H A D | mtk_disp_gamma.c | 211 unsigned int bpc, struct cmdq_pkt *cmdq_pkt) 219 mtk_ddp_write(cmdq_pkt, sz, &gamma->cmdq_reg, gamma->regs, DISP_GAMMA_SIZE); 222 DISP_GAMMA_CFG, GAMMA_DITHERING, cmdq_pkt); 209 mtk_gamma_config(struct device *dev, unsigned int w, unsigned int h, unsigned int vrefresh, unsigned int bpc, struct cmdq_pkt *cmdq_pkt) argument
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H A D | mtk_drm_crtc.c | 55 struct cmdq_pkt cmdq_handle; 117 static int mtk_drm_cmdq_pkt_create(struct cmdq_client *client, struct cmdq_pkt *pkt, 144 static void mtk_drm_cmdq_pkt_destroy(struct cmdq_pkt *pkt) 492 struct cmdq_pkt *cmdq_handle) 570 struct cmdq_pkt *cmdq_handle = &mtk_crtc->cmdq_handle;
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/linux-master/include/linux/soc/mediatek/ |
H A D | mtk-cmdq.h | 17 struct cmdq_pkt; 69 struct cmdq_pkt *cmdq_pkt_create(struct cmdq_client *client, size_t size); 75 void cmdq_pkt_destroy(struct cmdq_pkt *pkt); 86 int cmdq_pkt_write(struct cmdq_pkt *pkt, u8 subsys, u16 offset, u32 value); 98 int cmdq_pkt_write_mask(struct cmdq_pkt *pkt, u8 subsys, 110 int cmdq_pkt_read_s(struct cmdq_pkt *pkt, u16 high_addr_reg_idx, u16 addr_low, 127 int cmdq_pkt_write_s(struct cmdq_pkt *pkt, u16 high_addr_reg_idx, 145 int cmdq_pkt_write_s_mask(struct cmdq_pkt *pkt, u16 high_addr_reg_idx, 158 int cmdq_pkt_write_s_value(struct cmdq_pkt *pkt, u8 high_addr_reg_idx, 173 int cmdq_pkt_write_s_mask_value(struct cmdq_pkt *pk [all...] |
H A D | mtk-mmsys.h | 98 int height, struct cmdq_pkt *cmdq_pkt); 101 struct cmdq_pkt *cmdq_pkt); 104 u8 mode, u32 biwidth, struct cmdq_pkt *cmdq_pkt); 107 struct cmdq_pkt *cmdq_pkt); 110 struct cmdq_pkt *cmdq_pkt); [all...] |
/linux-master/drivers/soc/mediatek/ |
H A D | mtk-mmsys.c | 164 struct cmdq_pkt *cmdq_pkt) 169 if (mmsys->cmdq_base.size && cmdq_pkt) { 170 ret = cmdq_pkt_write_mask(cmdq_pkt, mmsys->cmdq_base.subsys, 217 struct cmdq_pkt *cmdq_pkt) 220 ~0, height << 16 | width, cmdq_pkt); local 225 struct cmdq_pkt *cmdq_pkt) 228 be_height << 16 | be_width, cmdq_pkt); local 163 mtk_mmsys_update_bits(struct mtk_mmsys *mmsys, u32 offset, u32 mask, u32 val, struct cmdq_pkt *cmdq_pkt) argument 216 mtk_mmsys_merge_async_config(struct device *dev, int idx, int width, int height, struct cmdq_pkt *cmdq_pkt) argument 224 mtk_mmsys_hdr_config(struct device *dev, int be_width, int be_height, struct cmdq_pkt *cmdq_pkt) argument 232 mtk_mmsys_mixer_in_config(struct device *dev, int idx, bool alpha_sel, u16 alpha, u8 mode, u32 biwidth, struct cmdq_pkt *cmdq_pkt) argument 246 mtk_mmsys_mixer_in_channel_swap(struct device *dev, int idx, bool channel_swap, struct cmdq_pkt *cmdq_pkt) argument 280 mtk_mmsys_vpp_rsz_merge_config(struct device *dev, u32 id, bool enable, struct cmdq_pkt *cmdq_pkt) argument 297 mtk_mmsys_update_bits(dev_get_drvdata(dev), reg, ~0, enable, cmdq_pkt); local 301 mtk_mmsys_vpp_rsz_dcm_config(struct device *dev, bool enable, struct cmdq_pkt *cmdq_pkt) argument [all...] |
H A D | mtk-cmdq-helper.c | 108 struct cmdq_pkt *cmdq_pkt_create(struct cmdq_client *client, size_t size) 110 struct cmdq_pkt *pkt; 141 void cmdq_pkt_destroy(struct cmdq_pkt *pkt) 152 static int cmdq_pkt_append_command(struct cmdq_pkt *pkt, 179 int cmdq_pkt_write(struct cmdq_pkt *pkt, u8 subsys, u16 offset, u32 value) 192 int cmdq_pkt_write_mask(struct cmdq_pkt *pkt, u8 subsys, 214 int cmdq_pkt_read_s(struct cmdq_pkt *pkt, u16 high_addr_reg_idx, u16 addr_low, 229 int cmdq_pkt_write_s(struct cmdq_pkt *pkt, u16 high_addr_reg_idx, 244 int cmdq_pkt_write_s_mask(struct cmdq_pkt *pkt, u16 high_addr_reg_idx, 267 int cmdq_pkt_write_s_value(struct cmdq_pkt *pk [all...] |
H A D | mtk-mutex.c | 924 struct cmdq_pkt *cmdq_pkt = (struct cmdq_pkt *)pkt; local 933 cmdq_pkt_write(cmdq_pkt, mtx->cmdq_reg.subsys,
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/linux-master/include/linux/mailbox/ |
H A D | mtk-cmdq-mailbox.h | 70 struct cmdq_pkt *pkt; 73 struct cmdq_pkt { struct
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/linux-master/drivers/media/platform/mediatek/mdp3/ |
H A D | mtk-mdp3-cmdq.h | 29 struct cmdq_pkt pkt;
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H A D | mtk-mdp3-cmdq.c | 474 static int mdp_cmdq_pkt_create(struct cmdq_client *client, struct cmdq_pkt *pkt, 501 static void mdp_cmdq_pkt_destroy(struct cmdq_pkt *pkt)
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/linux-master/drivers/mailbox/ |
H A D | mtk-cmdq-mailbox.c | 74 struct cmdq_pkt *pkt; /* the packet sent from mailbox client */ 385 struct cmdq_pkt *pkt = (struct cmdq_pkt *)data;
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