| /u-boot/common/ |
| H A D | avb_verify.c | 239 char *cmdarg[AVB_MAX_ARGS]; local
244 memset(cmdarg, 0, sizeof(cmdarg));
245 cmdarg[i++] = strtok((char *)cmdline, " ");
248 cmdarg[i] = strtok(NULL, " ");
249 if (!cmdarg[i])
260 i = avb_find_dm_args(&cmdarg[0], VERITY_TABLE_OPT_LOGGING);
262 cmdarg[i] = (char *)option;
264 i = avb_find_dm_args(&cmdarg[0], VERITY_TABLE_OPT_RESTART);
270 cmdarg[
[all...] |
| /u-boot/drivers/mmc/ |
| H A D | arm_pl180_mmci.c | 90 writel((u32)cmd->cmdarg, &host->base->argument);
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| H A D | bcm2835_sdhost.c | 437 writel(cmd->cmdarg, host->ioaddr + SDARG);
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| H A D | davinci_mmc.c | 236 set_val(®s->mmcarghl, cmd->cmdarg);
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| H A D | dw_mmc.c | 298 dwmci_writel(host, DWMCI_CMDARG, cmd->cmdarg);
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| H A D | fsl_esdhc.c | 39 uint cmdarg; /* Command argument register */ member in struct:fsl_esdhc
379 esdhc_write32(®s->cmdarg, cmd->cmdarg);
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| H A D | fsl_esdhc_imx.c | 62 uint cmdarg; /* Command argument register */ member in struct:fsl_esdhc
454 esdhc_write32(®s->cmdarg, cmd->cmdarg);
816 cmd.cmdarg = 0;
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| H A D | ftsdc010_mci.c | 70 uint32_t arg = mmc_cmd->cmdarg;
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| H A D | gen_atmel_mci.c | 277 writel(cmd->cmdarg, &mci->argr);
281 dump_cmd(cmdr, cmd->cmdarg, 0, "DEBUG");
288 dump_cmd(cmdr, cmd->cmdarg, status, "Command Time Out");
291 dump_cmd(cmdr, cmd->cmdarg, status, "Command Failed");
340 dump_cmd(cmdr, cmd->cmdarg, status,
352 dump_cmd(cmdr, cmd->cmdarg, status,
359 dump_cmd(cmdr, cmd->cmdarg, status,
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| H A D | iproc_sdhci.c | 192 cmd.cmdarg = 0;
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| H A D | jz_mmc.c | 211 writel(cmd->cmdarg, priv->regs + MSC_ARG);
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| H A D | meson_gx_mmc.c | 212 meson_write(mmc, cmd->cmdarg, MESON_SD_EMMC_CMD_ARG);
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| H A D | mmc.c | 76 printf("\t\tARG\t\t\t 0x%08x\n", cmd->cmdarg);
266 cmd.cmdarg = mmc->rca << 16;
327 cmd.cmdarg = len;
384 cmd.cmdarg = 0;
408 cmd.cmdarg = 0;
435 cmd.cmdarg = start;
437 cmd.cmdarg = start * mmc->read_bl_len;
538 cmd.cmdarg = 0;
565 cmd.cmdarg = 0;
622 cmd.cmdarg
[all...] |
| H A D | mmc_boot.c | 32 cmd.cmdarg = MMC_CMD62_ARG1;
43 cmd.cmdarg = MMC_CMD62_ARG2;
56 cmd.cmdarg = bootsize;
68 cmd.cmdarg = rpmbsize;
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| H A D | mmc_spi.c | 78 * @cmdarg: command argument
88 ushort cmdidx, u32 cmdarg, u32 resp_type,
98 debug("%s: cmd%d cmdarg=0x%x resp_type=0x%x "
100 __func__, cmdidx, cmdarg, resp_type,
105 cmdo[2] = cmdarg >> 24;
106 cmdo[3] = cmdarg >> 16;
107 cmdo[4] = cmdarg >> 8;
108 cmdo[5] = cmdarg;
337 cmd->cmdarg = 0x40000000;
386 ret = mmc_spi_sendcmd(dev, cmd->cmdidx, cmd->cmdarg, cm
87 mmc_spi_sendcmd(struct udevice *dev, ushort cmdidx, u32 cmdarg, u32 resp_type, u8 *resp, u32 resp_size, bool resp_match, u8 resp_match_value, bool r1b) argument
[all...] |
| H A D | mmc_write.c | 39 cmd.cmdarg = start;
47 cmd.cmdarg = end;
54 cmd.cmdarg = args ? args : MMC_ERASE_ARG;
162 cmd.cmdarg = start;
164 cmd.cmdarg = start * mmc->write_bl_len;
183 cmd.cmdarg = 0;
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| H A D | mtk-sd.c | 608 writel(cmd->cmdarg, &host->base->sdc_arg);
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| H A D | mvebu_mmc.c | 84 dev_dbg(dev, "cmdidx [0x%x] resp_type[0x%x] cmdarg[0x%x]\n",
85 cmd->cmdidx, cmd->resp_type, cmd->cmdarg);
164 mvebu_mmc_write(mmc, SDIO_ARG_LOW, cmd->cmdarg & 0xffff);
165 mvebu_mmc_write(mmc, SDIO_ARG_HI, cmd->cmdarg >> 16);
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| H A D | mxcmmc.c | 189 writel(cmd->cmdarg, &host->base->arg);
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| H A D | mxsmmc.c | 376 writel(cmd->cmdarg, &ssp_regs->hw_ssp_cmd1);
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| H A D | octeontx_hsmmc.c | 809 c = (cmd->cmdarg & 1) ? 1 : 2;
1154 ulong start = cmd->cmdarg;
1228 cmd->cmdarg, cmd->cmdarg, data->dest,
1244 cmd.cmdarg = mmc->rca << 16;
1269 ulong start = cmd->cmdarg;
1390 __func__, name, cmd->cmdidx, cmd->cmdarg, cmd->resp_type,
1431 emm_rca.s.card_rca = (cmd->cmdarg >> 16);
1440 octeontx_mmc_track_switch(mmc, cmd->cmdarg);
1448 emm_cmd.s.arg = cmd->cmdarg;
[all...] |
| H A D | omap_hsmmc.c | 1141 writel(cmd->cmdarg, &mmc_base->arg);
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| H A D | owl_mmc.c | 201 writel(cmd->cmdarg, priv->reg_base + OWL_REG_SD_ARG);
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| H A D | piton_mmc.c | 52 start_block = cmd->cmdarg;
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| H A D | rockchip_sdhci.c | 510 cmd.cmdarg = 0;
|