Searched refs:clk_data (Results 1 - 25 of 182) sorted by relevance

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/linux-master/drivers/clk/hisilicon/
H A Dclk-hip04.c29 struct hisi_clock_data *clk_data; local
31 clk_data = hisi_clk_init(np, HIP04_NR_CLKS);
32 if (!clk_data)
37 clk_data);
H A Dclk-hi3519.c30 struct hisi_clock_data *clk_data; member in struct:hi3519_crg_data
78 struct hisi_clock_data *clk_data; local
81 clk_data = hisi_clk_alloc(pdev, HI3519_NR_CLKS);
82 if (!clk_data)
87 clk_data);
93 clk_data);
99 clk_data);
104 of_clk_src_onecell_get, &clk_data->clk_data);
108 return clk_data;
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H A Dcrg-hi3516cv300.c132 struct hisi_clock_data *clk_data; local
135 clk_data = hisi_clk_alloc(pdev, HI3516CV300_CRG_NR_CLKS);
136 if (!clk_data)
140 ARRAY_SIZE(hi3516cv300_fixed_rate_clks), clk_data);
145 ARRAY_SIZE(hi3516cv300_mux_clks), clk_data);
150 ARRAY_SIZE(hi3516cv300_gate_clks), clk_data);
155 of_clk_src_onecell_get, &clk_data->clk_data);
159 return clk_data;
163 ARRAY_SIZE(hi3516cv300_gate_clks), clk_data);
206 struct hisi_clock_data *clk_data; local
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H A Dcrg.h20 struct hisi_clock_data *clk_data; member in struct:hisi_crg_dev
H A Dcrg-hi3798cv200.c199 struct hisi_clock_data *clk_data; local
202 clk_data = hisi_clk_alloc(pdev, HI3798CV200_CRG_NR_CLKS);
203 if (!clk_data)
210 clk_data);
216 clk_data);
222 clk_data);
228 clk_data);
233 of_clk_src_onecell_get, &clk_data->clk_data);
237 return clk_data;
292 struct hisi_clock_data *clk_data; local
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H A Dclk.c29 struct hisi_clock_data *clk_data; local
33 clk_data = devm_kmalloc(&pdev->dev, sizeof(*clk_data), GFP_KERNEL);
34 if (!clk_data)
40 clk_data->base = devm_ioremap(&pdev->dev,
42 if (!clk_data->base)
51 clk_data->clk_data.clks = clk_table;
52 clk_data->clk_data
61 struct hisi_clock_data *clk_data; local
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/linux-master/drivers/clk/mediatek/
H A Dclk-mtk.c39 static void mtk_init_clk_data(struct clk_hw_onecell_data *clk_data, argument
44 clk_data->num = clk_num;
47 clk_data->hws[i] = ERR_PTR(-ENOENT);
53 struct clk_hw_onecell_data *clk_data; local
55 clk_data = devm_kzalloc(dev, struct_size(clk_data, hws, clk_num),
57 if (!clk_data)
60 mtk_init_clk_data(clk_data, clk_num);
62 return clk_data;
68 struct clk_hw_onecell_data *clk_data; local
80 mtk_free_clk_data(struct clk_hw_onecell_data *clk_data) argument
86 mtk_clk_register_fixed_clks(const struct mtk_fixed_clk *clks, int num, struct clk_hw_onecell_data *clk_data) argument
132 mtk_clk_unregister_fixed_clks(const struct mtk_fixed_clk *clks, int num, struct clk_hw_onecell_data *clk_data) argument
152 mtk_clk_register_factors(const struct mtk_fixed_factor *clks, int num, struct clk_hw_onecell_data *clk_data) argument
198 mtk_clk_unregister_factors(const struct mtk_fixed_factor *clks, int num, struct clk_hw_onecell_data *clk_data) argument
329 mtk_clk_register_composites(struct device *dev, const struct mtk_composite *mcs, int num, void __iomem *base, spinlock_t *lock, struct clk_hw_onecell_data *clk_data) argument
377 mtk_clk_unregister_composites(const struct mtk_composite *mcs, int num, struct clk_hw_onecell_data *clk_data) argument
397 mtk_clk_register_dividers(struct device *dev, const struct mtk_clk_divider *mcds, int num, void __iomem *base, spinlock_t *lock, struct clk_hw_onecell_data *clk_data) argument
447 mtk_clk_unregister_dividers(const struct mtk_clk_divider *mcds, int num, struct clk_hw_onecell_data *clk_data) argument
472 struct clk_hw_onecell_data *clk_data; local
628 struct clk_hw_onecell_data *clk_data = platform_get_drvdata(pdev); local
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H A Dclk-cpumux.h16 struct clk_hw_onecell_data *clk_data);
19 struct clk_hw_onecell_data *clk_data);
H A Dclk-mt7622-infracfg.c62 struct clk_hw_onecell_data *clk_data; local
71 clk_data = mtk_alloc_clk_data(CLK_INFRA_NR_CLK);
72 if (!clk_data)
80 ARRAY_SIZE(infra_clks), clk_data);
85 ARRAY_SIZE(cpu_muxes), clk_data);
89 ret = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
96 mtk_clk_unregister_cpumuxes(cpu_muxes, ARRAY_SIZE(cpu_muxes), clk_data);
98 mtk_clk_unregister_gates(infra_clks, ARRAY_SIZE(infra_clks), clk_data);
100 mtk_free_clk_data(clk_data);
107 struct clk_hw_onecell_data *clk_data local
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H A Dclk-mt8195-apusys_pll.c61 struct clk_hw_onecell_data *clk_data; local
65 clk_data = mtk_alloc_clk_data(CLK_APUSYS_PLL_NR_CLK);
66 if (!clk_data)
69 r = mtk_clk_register_plls(node, apusys_plls, ARRAY_SIZE(apusys_plls), clk_data);
73 r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
77 platform_set_drvdata(pdev, clk_data);
82 mtk_clk_unregister_plls(apusys_plls, ARRAY_SIZE(apusys_plls), clk_data);
84 mtk_free_clk_data(clk_data);
90 struct clk_hw_onecell_data *clk_data = platform_get_drvdata(pdev); local
94 mtk_clk_unregister_plls(apusys_plls, ARRAY_SIZE(apusys_plls), clk_data);
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H A Dclk-mt7629-eth.c75 struct clk_hw_onecell_data *clk_data; local
79 clk_data = mtk_alloc_clk_data(CLK_ETH_NR_CLK);
80 if (!clk_data)
84 CLK_ETH_NR_CLK, clk_data);
86 r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
99 struct clk_hw_onecell_data *clk_data; local
104 clk_data = mtk_alloc_clk_data(CLK_SGMII_NR_CLK);
105 if (!clk_data)
109 CLK_SGMII_NR_CLK, clk_data);
111 r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
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H A Dclk-mt8188-apmixedsys.c101 struct clk_hw_onecell_data *clk_data; local
105 clk_data = mtk_alloc_clk_data(CLK_APMIXED_NR_CLK);
106 if (!clk_data)
109 r = mtk_clk_register_plls(node, plls, ARRAY_SIZE(plls), clk_data);
114 ARRAY_SIZE(apmixed_clks), clk_data);
118 r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
122 platform_set_drvdata(pdev, clk_data);
127 mtk_clk_unregister_gates(apmixed_clks, ARRAY_SIZE(apmixed_clks), clk_data);
129 mtk_clk_unregister_plls(plls, ARRAY_SIZE(plls), clk_data);
131 mtk_free_clk_data(clk_data);
138 struct clk_hw_onecell_data *clk_data = platform_get_drvdata(pdev); local
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H A Dclk-mt6795-pericfg.c96 struct clk_hw_onecell_data *clk_data; local
105 clk_data = mtk_alloc_clk_data(CLK_PERI_NR_CLK);
106 if (!clk_data)
114 ARRAY_SIZE(peri_gates), clk_data);
120 &mt6795_peri_clk_lock, clk_data);
124 ret = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
131 mtk_clk_unregister_composites(peri_clks, ARRAY_SIZE(peri_clks), clk_data);
133 mtk_clk_unregister_gates(peri_gates, ARRAY_SIZE(peri_gates), clk_data);
135 mtk_free_clk_data(clk_data);
142 struct clk_hw_onecell_data *clk_data local
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H A Dclk-mt6795-infracfg.c88 struct clk_hw_onecell_data *clk_data; local
97 clk_data = mtk_alloc_clk_data(CLK_INFRA_NR_CLK);
98 if (!clk_data)
106 ARRAY_SIZE(infra_gates), clk_data);
111 ARRAY_SIZE(cpu_muxes), clk_data);
115 ret = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
122 mtk_clk_unregister_cpumuxes(cpu_muxes, ARRAY_SIZE(cpu_muxes), clk_data);
124 mtk_clk_unregister_gates(infra_gates, ARRAY_SIZE(infra_gates), clk_data);
126 mtk_free_clk_data(clk_data);
133 struct clk_hw_onecell_data *clk_data local
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H A Dclk-mt7629.c549 struct clk_hw_onecell_data *clk_data; local
557 clk_data = mtk_alloc_clk_data(CLK_TOP_NR_CLK);
558 if (!clk_data)
562 clk_data);
565 clk_data);
569 &mt7629_clk_lock, clk_data);
571 clk_prepare_enable(clk_data->hws[CLK_TOP_AXI_SEL]->clk);
572 clk_prepare_enable(clk_data->hws[CLK_TOP_MEM_SEL]->clk);
573 clk_prepare_enable(clk_data->hws[CLK_TOP_DDRPHYCFG_SEL]->clk);
575 return of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
581 struct clk_hw_onecell_data *clk_data; local
599 struct clk_hw_onecell_data *clk_data; local
630 struct clk_hw_onecell_data *clk_data; local
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H A Dclk-mt7622-apmixedsys.c86 struct clk_hw_onecell_data *clk_data; local
95 clk_data = mtk_devm_alloc_clk_data(dev, CLK_APMIXED_NR_CLK);
96 if (!clk_data)
99 ret = mtk_clk_register_plls(node, plls, ARRAY_SIZE(plls), clk_data);
104 ARRAY_SIZE(apmixed_clks), clk_data);
108 ret = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
115 mtk_clk_unregister_gates(apmixed_clks, ARRAY_SIZE(apmixed_clks), clk_data);
117 mtk_clk_unregister_plls(plls, ARRAY_SIZE(plls), clk_data);
125 struct clk_hw_onecell_data *clk_data = platform_get_drvdata(pdev); local
128 mtk_clk_unregister_gates(apmixed_clks, ARRAY_SIZE(apmixed_clks), clk_data);
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/linux-master/drivers/clk/
H A Dclk-clps711x.c42 struct clk_hw_onecell_data clk_data; member in struct:clps711x_clk
56 clps711x_clk = kzalloc(struct_size(clps711x_clk, clk_data.hws,
108 clps711x_clk->clk_data.hws[CLPS711X_CLK_DUMMY] =
110 clps711x_clk->clk_data.hws[CLPS711X_CLK_CPU] =
112 clps711x_clk->clk_data.hws[CLPS711X_CLK_BUS] =
114 clps711x_clk->clk_data.hws[CLPS711X_CLK_PLL] =
116 clps711x_clk->clk_data.hws[CLPS711X_CLK_TIMERREF] =
118 clps711x_clk->clk_data.hws[CLPS711X_CLK_TIMER1] =
122 clps711x_clk->clk_data.hws[CLPS711X_CLK_TIMER2] =
126 clps711x_clk->clk_data
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/linux-master/drivers/clk/sunxi/
H A Dclk-sun6i-apb0-gates.c38 struct clk_onecell_data *clk_data; local
62 clk_data = devm_kzalloc(&pdev->dev, sizeof(struct clk_onecell_data),
64 if (!clk_data)
69 clk_data->clks = devm_kcalloc(&pdev->dev, (ngates + 1),
71 if (!clk_data->clks)
78 clk_data->clks[i] = clk_register_gate(&pdev->dev, clk_name,
81 WARN_ON(IS_ERR(clk_data->clks[i]));
86 clk_data->clk_num = ngates + 1;
88 return of_clk_add_provider(np, of_clk_src_onecell_get, clk_data);
H A Dclk-sun8i-bus-gates.c25 struct clk_onecell_data *clk_data; local
49 clk_data = kmalloc(sizeof(struct clk_onecell_data), GFP_KERNEL);
50 if (!clk_data)
56 clk_data->clks = kcalloc(number + 1, sizeof(struct clk *), GFP_KERNEL);
57 if (!clk_data->clks)
81 clk_data->clks[index] = clk_register_gate(NULL, clk_name,
87 if (IS_ERR(clk_data->clks[index])) {
93 clk_data->clk_num = number + 1;
94 of_clk_add_provider(node, of_clk_src_onecell_get, clk_data);
99 kfree(clk_data);
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H A Dclk-simple-gates.c22 struct clk_onecell_data *clk_data; local
39 clk_data = kmalloc(sizeof(struct clk_onecell_data), GFP_KERNEL);
40 if (!clk_data)
46 clk_data->clks = kcalloc(number + 1, sizeof(struct clk *), GFP_KERNEL);
47 if (!clk_data->clks)
57 clk_data->clks[index] = clk_register_gate(NULL, clk_name,
64 if (IS_ERR(clk_data->clks[index])) {
71 clk_prepare_enable(clk_data->clks[index]);
75 clk_data->clk_num = number + 1;
76 of_clk_add_provider(node, of_clk_src_onecell_get, clk_data);
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/linux-master/drivers/cpufreq/
H A Dhighbank-cpufreq.c36 struct clk_notifier_data *clk_data = hclk; local
40 if (clk_data->new_rate > clk_data->old_rate)
41 while (hb_voltage_change(clk_data->new_rate))
45 if (clk_data->new_rate < clk_data->old_rate)
46 while (hb_voltage_change(clk_data->new_rate))
/linux-master/drivers/clk/pistachio/
H A Dclk.c24 p->clk_data.clks = kcalloc(num_clks, sizeof(struct clk *), GFP_KERNEL);
25 if (!p->clk_data.clks)
27 p->clk_data.clk_num = num_clks;
38 kfree(p->clk_data.clks);
48 for (i = 0; i < p->clk_data.clk_num; i++) {
49 if (IS_ERR(p->clk_data.clks[i]))
51 PTR_ERR(p->clk_data.clks[i]));
54 of_clk_add_provider(p->node, of_clk_src_onecell_get, &p->clk_data);
69 p->clk_data.clks[gate[i].id] = clk;
87 p->clk_data
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/linux-master/drivers/gpu/drm/sun4i/
H A Dsun8i_tcon_top.c128 struct clk_hw_onecell_data *clk_data; local
140 clk_data = devm_kzalloc(dev, struct_size(clk_data, hws, CLK_NUM),
142 if (!clk_data)
144 clk_data->num = CLK_NUM;
145 tcon_top->clk_data = clk_data;
194 clk_data->hws[CLK_TCON_TOP_TV0] =
200 clk_data->hws[CLK_TCON_TOP_TV1] =
206 clk_data
241 struct clk_hw_onecell_data *clk_data = tcon_top->clk_data; local
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/linux-master/drivers/clk/imx/
H A Dclk-imx7ulp.c48 struct clk_hw_onecell_data *clk_data; local
52 clk_data = kzalloc(struct_size(clk_data, hws, IMX7ULP_CLK_SCG1_END),
54 if (!clk_data)
57 clk_data->num = IMX7ULP_CLK_SCG1_END;
58 hws = clk_data->hws;
129 imx_check_clk_hws(hws, clk_data->num);
131 of_clk_add_hw_provider(np, of_clk_hw_onecell_get, clk_data);
137 struct clk_hw_onecell_data *clk_data; local
141 clk_data
185 struct clk_hw_onecell_data *clk_data; local
232 struct clk_hw_onecell_data *clk_data; local
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/linux-master/drivers/clk/mvebu/
H A Dcommon.c35 static struct clk_onecell_data clk_data; variable in typeref:struct:clk_onecell_data
121 clk_data.clk_num = 2 + desc->num_ratios;
125 clk_data.clk_num += 1;
127 clk_data.clks = kcalloc(clk_data.clk_num, sizeof(*clk_data.clks),
129 if (WARN_ON(!clk_data.clks)) {
138 clk_data.clks[0] = clk_register_fixed_rate(NULL, tclk_name, NULL, 0,
140 WARN_ON(IS_ERR(clk_data.clks[0]));
151 clk_data
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Completed in 219 milliseconds

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