/linux-master/arch/arm/boot/compressed/ |
H A D | head-xscale.S | 28 mcr p15, 0, r0, c7, c7, 0 @ flush I & D caches 30 @ disabling MMU and caches
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H A D | head-sa1100.S | 38 mcr p15, 0, r0, c7, c7, 0 @ flush I & D caches 40 @ disabling MMU and caches
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/linux-master/include/linux/ |
H A D | bpf_mem_alloc.h | 12 struct bpf_mem_caches __percpu *caches; member in struct:bpf_mem_alloc
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/linux-master/tools/cgroup/ |
H A D | memcg_slabinfo.py | 184 caches = {} 203 caches[addr] = cache 215 for addr in caches: 217 cache_show(caches[addr], cfg, stats[addr])
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/linux-master/arch/arm/mm/ |
H A D | proc-sa110.S | 49 mcr p15, 0, r0, c1, c0, 0 @ disable caches 65 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches 110 * Clean the specified entry of any caches such that the MMU 162 mcr p15, 0, r10, c7, c7 @ invalidate I,D caches on v4
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H A D | proc-fa526.S | 39 mcr p15, 0, r0, c1, c0, 0 @ disable caches 58 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches 137 mcr p15, 0, r0, c7, c7 @ invalidate I,D caches on v4
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H A D | proc-arm720.S | 46 mcr p15, 0, r0, c1, c0, 0 @ disable caches 108 mcr p15, 0, r0, c7, c7, 0 @ invalidate caches 136 mcr p15, 0, r0, c7, c7, 0 @ invalidate caches
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H A D | proc-sa1100.S | 50 * - Clean and turn off caches. 57 mcr p15, 0, r0, c1, c0, 0 @ disable caches 73 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches 120 * Clean the specified entry of any caches such that the MMU 201 mcr p15, 0, r0, c7, c7 @ invalidate I,D caches on v4
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H A D | proc-arm920.S | 61 mcr p15, 0, r0, c1, c0, 0 @ disable caches 77 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches 173 * Harvard caches, you need to implement this function. 186 * Harvard caches, you need to implement this function. 389 mcr p15, 0, ip, c7, c7, 0 @ invalidate I+D caches 402 mcr p15, 0, r0, c7, c7 @ invalidate I,D caches on v4
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H A D | proc-mohawk.S | 44 mcr p15, 0, r0, c1, c0, 0 @ disable caches 62 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches 155 * Harvard caches, you need to implement this function. 168 * Harvard caches, you need to implement this function. 359 mcr p15, 0, ip, c7, c7, 0 @ invalidate I & D caches, BTB 378 mcr p15, 0, r0, c7, c7 @ invalidate I,D caches
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H A D | proc-arm740.S | 40 mcr p15, 0, r0, c1, c0, 0 @ disable caches 62 mcr p15, 0, r0, c7, c0, 0 @ invalidate caches
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H A D | proc-arm926.S | 53 mcr p15, 0, r0, c1, c0, 0 @ disable caches 69 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches 184 * Harvard caches, you need to implement this function. 197 * Harvard caches, you need to implement this function. 404 mcr p15, 0, ip, c7, c7, 0 @ invalidate I+D caches 417 mcr p15, 0, r0, c7, c7 @ invalidate I,D caches on v4 425 mov r0, #4 @ disable write-back on caches explicitly
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H A D | proc-arm922.S | 63 mcr p15, 0, r0, c1, c0, 0 @ disable caches 79 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches 175 * Harvard caches, you need to implement this function. 188 * Harvard caches, you need to implement this function. 380 mcr p15, 0, r0, c7, c7 @ invalidate I,D caches on v4
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H A D | proc-arm1020e.S | 69 mcr p15, 0, r0, c1, c0, 0 @ disable caches 85 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches 191 * Harvard caches, you need to implement this function. 203 * Harvard caches, you need to implement this function. 415 mcr p15, 0, r0, c7, c7 @ invalidate I,D caches on v4
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H A D | proc-arm1026.S | 69 mcr p15, 0, r0, c1, c0, 0 @ disable caches 85 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches 185 * Harvard caches, you need to implement this function. 197 * Harvard caches, you need to implement this function. 397 mcr p15, 0, r0, c7, c7 @ invalidate I,D caches on v4
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H A D | proc-arm1022.S | 69 mcr p15, 0, r0, c1, c0, 0 @ disable caches 85 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches 190 * Harvard caches, you need to implement this function. 203 * Harvard caches, you need to implement this function. 408 mcr p15, 0, r0, c7, c7 @ invalidate I,D caches on v4
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H A D | proc-arm925.S | 84 mcr p15, 0, r0, c1, c0, 0 @ disable caches 109 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches 221 * Harvard caches, you need to implement this function. 234 * Harvard caches, you need to implement this function. 436 mcr p15, 0, r0, c7, c7 @ invalidate I,D caches on v4 443 mov r0, #4 @ disable write-back on caches explicitly
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H A D | proc-xsc3.S | 92 mcr p15, 0, r0, c1, c0, 0 @ disable caches 113 mcr p15, 0, ip, c7, c7, 0 @ invalidate L1 caches and BTB 212 * Harvard caches, you need to implement this function. 430 mcr p15, 0, ip, c7, c7, 0 @ invalidate I & D caches, BTB 450 mcr p15, 0, ip, c7, c7, 0 @ invalidate L1 caches and BTB
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H A D | pv-fixup-asm.S | 23 bic ip, r8, #CR_M @ disable caches and MMU
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/linux-master/kernel/bpf/ |
H A D | memalloc.c | 577 ma->caches = pcc; 589 ma->caches = pcc; 611 pcc = ma->caches; 674 if (ma->caches) { 676 cc = per_cpu_ptr(ma->caches, cpu); 689 free_percpu(ma->caches); 691 ma->caches = NULL; 766 if (ma->caches) { 769 cc = per_cpu_ptr(ma->caches, cpu); 909 ret = unit_alloc(this_cpu_ptr(ma->caches) [all...] |
/linux-master/tools/perf/util/ |
H A D | header.h | 185 int build_caches_for_cpu(u32 cpu, struct cpu_cache_level caches[], u32 *cntp);
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H A D | env.h | 96 struct cpu_cache_level *caches; member in struct:perf_env
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H A D | header.c | 1214 * Build caches levels for a particular CPU from the data in 1216 * The cache level data is stored in caches[] from index at 1219 int build_caches_for_cpu(u32 cpu, struct cpu_cache_level caches[], u32 *cntp) argument 1236 if (cpu_cache_level__cmp(&c, &caches[i])) 1241 caches[*cntp] = c; 1250 static int build_caches(struct cpu_cache_level caches[], u32 *cntp) argument 1257 int ret = build_caches_for_cpu(cpu, caches, &cnt); 1270 struct cpu_cache_level caches[max_caches]; local 1274 ret = build_caches(caches, &cnt); 1278 qsort(&caches, cn 2909 struct cpu_cache_level *caches; local [all...] |
/linux-master/tools/perf/ |
H A D | builtin-stat.c | 1344 struct cpu_cache_level caches[MAX_CACHE_LVL]; local 1350 ret = build_caches_for_cpu(cpu.cpu, caches, &caches_cnt); 1374 if (caches[i].level > caches[max_level_index].level) 1378 cache->cache_lvl = caches[max_level_index].level; 1379 cache->cache = cpu__get_cache_id_from_map(cpu, caches[max_level_index].map); 1381 /* Reset i to 0 to free entire caches[] */ 1387 if (caches[i].level == cache_level) { 1389 cache->cache = cpu__get_cache_id_from_map(cpu, caches[i].map); 1392 cpu_cache_level__free(&caches[ 1710 struct cpu_cache_level *caches = env->caches; local [all...] |
/linux-master/drivers/acpi/numa/ |
H A D | hmat.c | 73 struct list_head caches; member in struct:memory_target 194 INIT_LIST_HEAD(&target->caches); 531 list_add_tail(&tcache->node, &target->caches); 839 list_for_each_entry(tcache, &target->caches, node) 1001 list_for_each_entry_safe(tcache, cnext, &target->caches, node) {
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