| /linux-master/arch/arm/include/asm/ |
| H A D | arch_gicv3.h | 18 #define ICC_EOIR1 __ACCESS_CP15(c12, 0, c12, 1)
19 #define ICC_DIR __ACCESS_CP15(c12, 0, c11, 1)
20 #define ICC_IAR1 __ACCESS_CP15(c12, 0, c12, 0)
21 #define ICC_SGI1R __ACCESS_CP15_64(0, c12)
23 #define ICC_CTLR __ACCESS_CP15(c12, 0, c12, 4)
24 #define ICC_SRE __ACCESS_CP15(c12, 0, c12,
[all...] |
| H A D | arm_pmuv3.h | 14 #define PMCR __ACCESS_CP15(c9, 0, c12, 0)
15 #define PMCNTENSET __ACCESS_CP15(c9, 0, c12, 1)
16 #define PMCNTENCLR __ACCESS_CP15(c9, 0, c12, 2)
17 #define PMOVSR __ACCESS_CP15(c9, 0, c12, 3)
18 #define PMSELR __ACCESS_CP15(c9, 0, c12, 5)
19 #define PMCEID0 __ACCESS_CP15(c9, 0, c12, 6)
20 #define PMCEID1 __ACCESS_CP15(c9, 0, c12, 7)
63 #define PMEVTYPER0 __ACCESS_CP15(c14, 0, c12, 0)
64 #define PMEVTYPER1 __ACCESS_CP15(c14, 0, c12, 1)
65 #define PMEVTYPER2 __ACCESS_CP15(c14, 0, c12,
[all...] |
| /linux-master/arch/arm/include/asm/hardware/ |
| H A D | cp14.h | 69 #define RCP14_DBGBVR12() MRC14(0, c0, c12, 4)
85 #define RCP14_DBGBCR12() MRC14(0, c0, c12, 5)
101 #define RCP14_DBGWVR12() MRC14(0, c0, c12, 6)
117 #define RCP14_DBGWCR12() MRC14(0, c0, c12, 7)
134 #define RCP14_DBGBXVR12() MRC14(0, c1, c12, 1)
174 #define WCP14_DBGBVR12(val) MCR14(val, 0, c0, c12, 4)
190 #define WCP14_DBGBCR12(val) MCR14(val, 0, c0, c12, 5)
206 #define WCP14_DBGWVR12(val) MCR14(val, 0, c0, c12, 6)
222 #define WCP14_DBGWCR12(val) MCR14(val, 0, c0, c12, 7)
238 #define WCP14_DBGBXVR12(val) MCR14(val, 0, c1, c12,
[all...] |
| /linux-master/tools/perf/arch/s390/include/ |
| H A D | dwarf-regs-table.h | 42 REG_DWARFNUM_NAME(c12, 44),
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| /linux-master/arch/arm/kernel/ |
| H A D | hyp-stub.S | 116 mcr p15, 4, r7, c12, c0, 0 @ set hypervisor vector base (HVBAR)
172 mrc p15, 4, r7, c12, c9, 5 @ ICC_HSRE
174 mcr p15, 4, r7, c12, c9, 5 @ ICC_HSRE
179 mrc p15, 4, r7, c12, c9, 5 @ ICC_HSRE
183 mcr p15, 4, r7, c12, c11, 0 @ ICH_HCR
195 mcr p15, 4, r1, c12, c0, 0 @ set HVBAR
|
| /linux-master/drivers/iio/pressure/ |
| H A D | mpl115.c | 30 s16 c12; member in struct:mpl115_data
70 a1 = data->b1 + ((data->c12 * tadc) >> 11);
198 data->c12 = ret;
|
| /linux-master/drivers/gpu/drm/tidss/ |
| H A D | tidss_dispc.c | 1170 u16 c12; local
1172 c12 = c8 << 4;
1176 /* Copy c8 4 MSB to 4 LSB for full scale c12 */
1177 c12 |= c8 >> 4;
1180 c12 |= 0xF;
1187 return c12;
1690 u32 c12; local
1694 c12 = FLD_VAL(c1, 19, 10) | FLD_VAL(c2, 29, 20);
1696 dispc_vid_write(dispc, hw_plane, reg, c12);
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| /linux-master/drivers/gpu/drm/vc4/ |
| H A D | vc4_hvs.c | 162 c9, c10, c11, c12, c13, c14, c15) \
167 VC4_PPF_FILTER_WORD(c12, c13, c14), \
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| /linux-master/drivers/staging/media/ipu3/include/uapi/ |
| H A D | intel-ipu3.h | 1619 * @c12: Coeff23, s0.8, range [-255, 255], default 55.
1625 __u32 c12:9; member in struct:ipu3_uapi_unsharp_coef1
1852 * @c12: range [0, 3], default 0x1
1875 __u32 c12:2; member in struct:ipu3_uapi_yuvp1_yds_config
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| /linux-master/arch/arm/mach-omap2/ |
| H A D | sram242x.S | 235 mcrr p15, 1, r8, r4, c12 @ preload into icache
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| H A D | sram243x.S | 235 mcrr p15, 1, r8, r4, c12 @ preload into icache
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| /linux-master/arch/powerpc/crypto/ |
| H A D | chacha-p10le-8x.S | 33 # a12 b12 c12 d12
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| /linux-master/arch/arm64/include/asm/ |
| H A D | assembler.h | 393 sys 3, c7, c12, 1, \start // dc cvap variable
|