Searched refs:bit_idx (Results 1 - 25 of 110) sorted by relevance

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/linux-master/drivers/clk/berlin/
H A Dcommon.h14 u8 bit_idx; member in struct:berlin2_gate_data
/linux-master/drivers/net/wireless/ath/wcn36xx/
H A Dfirmware.c84 int arr_idx, bit_idx; local
92 bit_idx = cap % 32;
93 bitmap[arr_idx] |= (1 << bit_idx);
99 int arr_idx, bit_idx; local
107 bit_idx = cap % 32;
109 return (bitmap[arr_idx] & (1 << bit_idx)) ? 1 : 0;
115 int arr_idx, bit_idx; local
123 bit_idx = cap % 32;
124 bitmap[arr_idx] &= ~(1 << bit_idx);
/linux-master/drivers/clk/actions/
H A Dowl-gate.c27 reg |= BIT(gate_hw->bit_idx);
29 reg &= ~BIT(gate_hw->bit_idx);
60 reg ^= BIT(gate_hw->bit_idx);
62 return !!(reg & BIT(gate_hw->bit_idx));
H A Dowl-gate.h18 u8 bit_idx; member in struct:owl_gate_hw
30 .bit_idx = _bit_idx, \
H A Dowl-pll.h27 u8 bit_idx; member in struct:owl_pll_hw
46 .bit_idx = _bit_idx, \
/linux-master/drivers/clk/hisilicon/
H A Dclkgate-separated.c27 u8 bit_idx; /* bits in enable/disable register */ member in struct:clkgate_separated
41 reg = BIT(sclk->bit_idx);
58 reg = BIT(sclk->bit_idx);
72 reg &= BIT(sclk->bit_idx);
86 void __iomem *reg, u8 bit_idx,
104 sclk->bit_idx = bit_idx;
83 hisi_register_clkgate_sep(struct device *dev, const char *name, const char *parent_name, unsigned long flags, void __iomem *reg, u8 bit_idx, u8 clk_gate_flags, spinlock_t *lock) argument
/linux-master/drivers/clk/imx/
H A Dclk-gate2.c31 u8 bit_idx; member in struct:clk_gate2
47 reg &= ~(gate->cgr_mask << gate->bit_idx);
49 reg |= (gate->cgr_val & gate->cgr_mask) << gate->bit_idx;
89 static int clk_gate2_reg_is_enabled(void __iomem *reg, u8 bit_idx, argument
94 if (((val >> bit_idx) & cgr_mask) == cgr_val)
108 ret = clk_gate2_reg_is_enabled(gate->reg, gate->bit_idx,
138 void __iomem *reg, u8 bit_idx, u8 cgr_val, u8 cgr_mask,
153 gate->bit_idx = bit_idx;
136 clk_hw_register_gate2(struct device *dev, const char *name, const char *parent_name, unsigned long flags, void __iomem *reg, u8 bit_idx, u8 cgr_val, u8 cgr_mask, u8 clk_gate2_flags, spinlock_t *lock, unsigned int *share_count) argument
H A Dclk-scu.h44 void __iomem *reg, u8 bit_idx, bool hw_gate);
65 void __iomem *reg, u8 bit_idx, bool hw_gate)
68 bit_idx, hw_gate);
73 u8 bit_idx, bool hw_gate)
76 bit_idx, hw_gate);
63 imx_clk_lpcg_scu_dev(struct device *dev, const char *name, const char *parent_name, unsigned long flags, void __iomem *reg, u8 bit_idx, bool hw_gate) argument
71 imx_clk_lpcg_scu(const char *name, const char *parent_name, unsigned long flags, void __iomem *reg, u8 bit_idx, bool hw_gate) argument
H A Dclk-lpcg-scu.c27 * @bit_idx: bit index of this LPCG clock
35 u8 bit_idx; member in struct:clk_lpcg_scu
53 reg &= ~(CLK_GATE_SCU_LPCG_MASK << clk->bit_idx);
59 reg |= val << clk->bit_idx;
76 reg &= ~(CLK_GATE_SCU_LPCG_MASK << clk->bit_idx);
89 void __iomem *reg, u8 bit_idx, bool hw_gate)
101 clk->bit_idx = bit_idx;
87 __imx_clk_lpcg_scu(struct device *dev, const char *name, const char *parent_name, unsigned long flags, void __iomem *reg, u8 bit_idx, bool hw_gate) argument
H A Dclk-gate-93.c38 u32 bit_idx; member in struct:imx93_clk_gate
58 val &= ~(gate->mask << gate->bit_idx);
60 val |= (gate->val & gate->mask) << gate->bit_idx;
111 if (((val >> gate->bit_idx) & gate->mask) == gate->val)
158 unsigned long flags, void __iomem *reg, u32 bit_idx, u32 val,
173 gate->bit_idx = bit_idx;
157 imx93_clk_gate(struct device *dev, const char *name, const char *parent_name, unsigned long flags, void __iomem *reg, u32 bit_idx, u32 val, u32 mask, u32 domain_id, unsigned int *share_count) argument
/linux-master/drivers/clk/
H A Dclk-gate.c71 reg = BIT(gate->bit_idx + 16);
73 reg |= BIT(gate->bit_idx);
78 reg |= BIT(gate->bit_idx);
80 reg &= ~BIT(gate->bit_idx);
112 reg ^= BIT(gate->bit_idx);
114 reg &= BIT(gate->bit_idx);
132 void __iomem *reg, u8 bit_idx,
141 if (bit_idx > 15) {
165 gate->bit_idx = bit_idx;
127 __clk_hw_register_gate(struct device *dev, struct device_node *np, const char *name, const char *parent_name, const struct clk_hw *parent_hw, const struct clk_parent_data *parent_data, unsigned long flags, void __iomem *reg, u8 bit_idx, u8 clk_gate_flags, spinlock_t *lock) argument
185 clk_register_gate(struct device *dev, const char *name, const char *parent_name, unsigned long flags, void __iomem *reg, u8 bit_idx, u8 clk_gate_flags, spinlock_t *lock) argument
232 __devm_clk_hw_register_gate(struct device *dev, struct device_node *np, const char *name, const char *parent_name, const struct clk_hw *parent_hw, const struct clk_parent_data *parent_data, unsigned long flags, void __iomem *reg, u8 bit_idx, u8 clk_gate_flags, spinlock_t *lock) argument
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H A Dclk-stm32f4.c49 u8 bit_idx; member in struct:stm32f4_gate_data
410 u8 bit_idx; member in struct:clk_apb_mul
420 if (readl(base + STM32F4_RCC_CFGR) & BIT(am->bit_idx))
432 if (readl(base + STM32F4_RCC_CFGR) & BIT(am->bit_idx))
464 unsigned long flags, u8 bit_idx)
474 am->bit_idx = bit_idx;
539 u8 bit_idx; member in struct:stm32f4_vco_data
811 pll->gate.bit_idx = vco->bit_idx;
462 clk_register_apb_mul(struct device *dev, const char *name, const char *parent_name, unsigned long flags, u8 bit_idx) argument
957 clk_register_rgate(struct device *dev, const char *name, const char *parent_name, unsigned long flags, void __iomem *reg, u8 bit_idx, u8 bit_rdy_idx, u8 clk_gate_flags, spinlock_t *lock) argument
1053 stm32_register_cclk(struct device *dev, const char *name, const char * const *parent_names, int num_parents, void __iomem *reg, u8 bit_idx, u8 shift, unsigned long flags, spinlock_t *lock) argument
1160 u8 bit_idx; member in struct:stm32_aux_clk
1623 stm32_register_aux_clk(const char *name, const char * const *parent_names, int num_parents, int offset_mux, u8 shift, u8 mask, int offset_gate, u8 bit_idx, unsigned long flags, spinlock_t *lock) argument
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/linux-master/drivers/xen/events/
H A Devents_2l.c170 int word_idx, bit_idx; local
180 bit_idx = evtchn % BITS_PER_LONG;
181 if (active_evtchns(cpu, s, word_idx) & (1ULL << bit_idx))
207 bit_idx = 0;
213 bit_idx = 0; /* usually scan entire word from start */
228 bit_idx = start_bit_idx;
235 bits = MASK_LSBS(pending_bits, bit_idx);
241 bit_idx = EVTCHN_FIRST_BIT(bits);
244 port = (word_idx * BITS_PER_EVTCHN_WORD) + bit_idx;
247 bit_idx
[all...]
/linux-master/drivers/clk/mvebu/
H A Dcommon.h41 int bit_idx; member in struct:clk_gating_soc_desc
H A Dcp110-system-controller.c116 u8 bit_idx; member in struct:cp110_gate_clk
126 BIT(gate->bit_idx), BIT(gate->bit_idx));
136 BIT(gate->bit_idx), 0);
146 return val & BIT(gate->bit_idx);
157 struct regmap *regmap, u8 bit_idx)
176 gate->bit_idx = bit_idx;
155 cp110_register_gate(const char *name, const char *parent_name, struct regmap *regmap, u8 bit_idx) argument
/linux-master/drivers/mmc/host/
H A Dmeson-mx-sdhc-clkc.c126 clkc_data->mod_clk_en.bit_idx = 15;
135 clkc_data->tx_clk_en.bit_idx = 14;
144 clkc_data->rx_clk_en.bit_idx = 13;
153 clkc_data->sd_clk_en.bit_idx = 12;
/linux-master/drivers/clk/meson/
H A Dclk-regmap.h38 * @bit_idx: single bit controlling gate
46 u8 bit_idx; member in struct:clk_regmap_gate_data
121 .bit_idx = (_bit), \
H A Da1-peripherals.c23 .bit_idx = 0,
38 .bit_idx = 1,
53 .bit_idx = 2,
68 .bit_idx = 3,
83 .bit_idx = 4,
98 .bit_idx = 5,
113 .bit_idx = 6,
128 .bit_idx = 31,
193 .bit_idx = 24,
227 .bit_idx
[all...]
H A Dg12a-aoclk.c50 .bit_idx = (_bit), \
82 .bit_idx = 14,
109 .bit_idx = 31,
182 .bit_idx = 30,
200 .bit_idx = 31,
273 .bit_idx = 30,
361 .bit_idx = 8,
H A Daxg.c340 .bit_idx = 27,
367 .bit_idx = 28,
405 .bit_idx = 29,
431 .bit_idx = 30,
459 .bit_idx = 31,
525 .bit_idx = 14,
576 .bit_idx = 14,
632 .bit_idx = 14,
683 .bit_idx = 0,
833 .bit_idx
[all...]
H A Daxg-aoclk.c41 .bit_idx = (_bit), \
65 .bit_idx = 14,
80 .bit_idx = 31,
163 .bit_idx = 30,
251 .bit_idx = 8,
H A Da1-pll.c65 .bit_idx = 20,
157 .bit_idx = 21,
195 .bit_idx = 22,
228 .bit_idx = 23,
261 .bit_idx = 24,
H A Dgxbb.c574 .bit_idx = 27,
601 .bit_idx = 28,
639 .bit_idx = 29,
665 .bit_idx = 30,
691 .bit_idx = 31,
778 .bit_idx = 14,
830 .bit_idx = 14,
873 .bit_idx = 14,
935 .bit_idx = 7,
986 .bit_idx
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/linux-master/drivers/clk/ti/
H A Dinterface.c30 struct clk_omap_reg *reg, u8 bit_idx,
44 clk_hw->enable_bit = bit_idx;
27 _register_interface(struct device_node *node, const char *name, const char *parent_name, struct clk_omap_reg *reg, u8 bit_idx, const struct clk_hw_omap_ops *ops) argument
/linux-master/arch/arm/mach-ep93xx/
H A Dclock.c63 u8 bit_idx; member in struct:clk_psc
79 return (val & BIT(psc->bit_idx)) ? 1 : 0;
92 val |= BIT(psc->bit_idx);
112 val &= ~BIT(psc->bit_idx);
129 u8 bit_idx)
146 psc->bit_idx = bit_idx;
326 u8 bit_idx)
343 psc->bit_idx = bit_idx;
126 ep93xx_clk_register_gate(const char *name, const char *parent_name, void __iomem *reg, u8 bit_idx) argument
324 clk_hw_register_ddiv(const char *name, void __iomem *reg, u8 bit_idx) argument
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