Searched refs:bank_nr (Results 1 - 4 of 4) sorted by relevance

/linux-master/drivers/irqchip/
H A Dirq-stm32-exti.c46 u32 bank_nr; member in struct:stm32_exti_drv_data
85 .bank_nr = ARRAY_SIZE(stm32f4xx_exti_banks),
129 .bank_nr = ARRAY_SIZE(stm32h7xx_exti_banks),
285 .bank_nr = ARRAY_SIZE(stm32mp1_exti_banks),
291 .bank_nr = ARRAY_SIZE(stm32mp1_exti_banks),
629 for (i = 0; i < stm32_host_data->drv_data->bank_nr; i++) {
644 for (i = 0; i < stm32_host_data->drv_data->bank_nr; i++) {
722 if (hwirq >= host_data->drv_data->bank_nr * IRQS_PER_BANK)
762 host_data->chips_data = kcalloc(dd->bank_nr,
828 domain = irq_domain_add_linear(node, drv_data->bank_nr * IRQS_PER_BAN
[all...]
/linux-master/drivers/pinctrl/stm32/
H A Dpinctrl-stm32.c96 u32 bank_nr; member in struct:stm32_gpio_bank
212 int pin = offset + (bank->bank_nr * STM32_GPIO_PINS_PER_BANK);
298 dev_dbg(pctl->dev, "No access to gpio %d - %d\n", bank->bank_nr, i);
1270 unsigned int stm32_pin_nb = bank->bank_nr * STM32_GPIO_PINS_PER_BANK + offset;
1299 int bank_nr, err, i = 0; local
1324 bank_nr = args.args[1] / STM32_GPIO_PINS_PER_BANK;
1332 bank_nr = pctl->nbanks;
1333 bank->gpio_chip.base = bank_nr * STM32_GPIO_PINS_PER_BANK;
1335 range->id = bank_nr;
1341 &pctl->banks[bank_nr]
[all...]
/linux-master/drivers/crypto/intel/qat/qat_common/
H A Dadf_accel_devices.h246 int (*ring_pair_reset)(struct adf_accel_dev *accel_dev, u32 bank_nr);
/linux-master/drivers/pinctrl/
H A Dpinctrl-st.c1501 int bank_nr, struct device_node *np)
1503 struct st_gpio_bank *bank = &info->banks[bank_nr];
1500 st_gpiolib_register_bank(struct st_pinctrl *info, int bank_nr, struct device_node *np) argument

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