| /linux-master/drivers/mfd/ |
| H A D | mt6370.c | 187 u8 bank_idx, bank_addr; local
190 bank_idx = u8_buf[0];
193 ret = i2c_smbus_read_i2c_block_data(info->i2c[bank_idx], bank_addr,
208 u8 bank_idx, bank_addr; local
211 bank_idx = u8_buf[0];
214 return i2c_smbus_write_i2c_block_data(info->i2c[bank_idx], bank_addr,
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| /linux-master/drivers/clk/ |
| H A D | clk-versaclock7.c | 370 unsigned int bank_idx,
375 if (bank_idx == 0 || bank_idx == 1) {
396 } else if (bank_idx == 2) {
413 } else if (bank_idx == 3) {
430 } else if (bank_idx == 4) {
453 } else if (bank_idx == 5) {
483 } else if (bank_idx == 6) {
512 pr_warn("bank_src%d = %d is not supported\n", bank_idx, output_bank_src);
1101 unsigned int i, val, bank_idx, out_nu local
369 vc7_get_bank_clk(struct vc7_driver_data *vc7, unsigned int bank_idx, unsigned int output_bank_src, struct vc7_bank_src_map *map) argument
[all...] |
| /linux-master/security/integrity/ima/ |
| H A D | ima_crypto.c | 843 int rc, i, bank_idx = -1; local
848 bank_idx = i;
853 bank_idx = i;
855 if (bank_idx == -1 && crypto_id == HASH_ALGO_SHA1)
856 bank_idx = i;
859 if (bank_idx == -1) {
864 hash->algo = ima_tpm_chip->allocated_banks[bank_idx].crypto_id;
871 alg_id = ima_tpm_chip->allocated_banks[bank_idx].alg_id;
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| /linux-master/drivers/gpu/drm/i915/display/ |
| H A D | intel_dkl_phy.c | 32 HIP_INDEX_VAL(tc_port, reg.bank_idx));
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| H A D | intel_dkl_phy_regs.h | 13 u32 bank_idx:4; member in struct:intel_dkl_phy_reg
43 .bank_idx = _DKL_REG_BANK_IDX(phy_offset), \
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| /linux-master/drivers/crypto/intel/qat/qat_common/ |
| H A D | adf_gen4_hw_data.c | 398 * @bank_idx: Offset to the bank within this device
408 u32 bank_idx, int timeout_ms)
422 int_col_ctl = csr_ops->read_csr_int_col_ctl(csr_etr, bank_idx);
427 int_col_en = csr_ops->read_csr_int_col_en(csr_etr, bank_idx);
430 e_stat = csr_ops->read_csr_e_stat(csr_etr, bank_idx);
439 bank_idx, wait_us, timeout_ms, e_stat, int_col_en); local
443 csr_misc, ADF_WQM_CSR_RPINTSOU(bank_idx));
447 bank_idx, wait_us); local
407 adf_gen4_bank_quiesce_coal_timer(struct adf_accel_dev *accel_dev, u32 bank_idx, int timeout_ms) argument
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| H A D | adf_gen4_hw_data.h | 173 u32 bank_idx, int timeout_ms);
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| /linux-master/drivers/soc/mediatek/ |
| H A D | mtk-svs.c | 1212 unsigned int bank_idx,
1215 struct svs_bank *svsb = &svsp->banks[bank_idx];
1280 unsigned short bank_idx,
1283 struct svs_bank *svsb = &svsp->banks[bank_idx];
1291 unsigned short bank_idx)
1293 struct svs_bank *svsb = &svsp->banks[bank_idx];
1305 svs_save_bank_register_data(svsp, bank_idx, SVSB_PHASE_ERROR);
1313 unsigned short bank_idx)
1315 struct svs_bank *svsb = &svsp->banks[bank_idx];
1323 svs_save_bank_register_data(svsp, bank_idx, SVSB_PHASE_INIT0
1211 svs_set_bank_phase(struct svs_platform *svsp, unsigned int bank_idx, enum svsb_phase target_phase) argument
1279 svs_save_bank_register_data(struct svs_platform *svsp, unsigned short bank_idx, enum svsb_phase phase) argument
1290 svs_error_isr_handler(struct svs_platform *svsp, unsigned short bank_idx) argument
1312 svs_init01_isr_handler(struct svs_platform *svsp, unsigned short bank_idx) argument
1341 svs_init02_isr_handler(struct svs_platform *svsp, unsigned short bank_idx) argument
1361 svs_mon_mode_isr_handler(struct svs_platform *svsp, unsigned short bank_idx) argument
[all...] |
| /linux-master/drivers/irqchip/ |
| H A D | irq-stm32-exti.c | 813 u32 bank_idx,
820 stm32_bank = h_data->drv_data->exti_banks[bank_idx];
821 chip_data = &h_data->chips_data[bank_idx];
839 pr_info("%pOF: bank%d\n", node, bank_idx);
812 stm32_exti_chip_init(struct stm32_exti_host_data *h_data, u32 bank_idx, struct device_node *node) argument
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| /linux-master/include/linux/habanalabs/ |
| H A D | cpucp_if.h | 1306 __u8 bank_idx; member in struct:cpucp_hbm_row_info
|